Process completed with exit code 1.

Failed test found in: test/Hast.Transformer.Vhdl.Tests/TestResults/test-results.trx Error: Shouldly.ShouldMatchApprovedException : To approve the changes run this command: cp "/home/ubuntu/work/Hastlayer-SDK/Hastlayer-SDK/test/Hast.Transformer.Vhdl.Tests/VerificationTests/VerificationSources/CatapultSamplesVerificationTests.Posit32FusedSampleMatchesApproved.received.vhdl" "/home/ubuntu/work/Hastlayer-SDK/Hastlayer-SDK/test/Hast.Transformer.Vhdl.Tests/VerificationTests/VerificationSources/CatapultSamplesVerificationTests.Posit32FusedSampleMatchesApproved.approved.vhdl" ---------------------------- string.Join( string.Empty, hardwareDescriptions.Select(hardwareDescription => hardwareDescription.VhdlSource + hardwareDescription.XdcSource)) should match approved with options: Ignoring line endings "-- Generated by Hastlayer (hastlayer.com) at <date and time removed for approval testing> for the following hardware entry points: -- * System.Void Hast.Samples.SampleAssembly.Posit32FusedCalculator::CalculateFusedSum(Hast.Transformer.SimpleMemory.SimpleMemory) -- VHDL libraries necessary for the generated code to work. These libraries are included here instead of being managed separately in the Hardware Framework so they can be more easily updated. library ieee; use ieee.std_logic_1164.all; use ieee.numeric_std.all; package TypeConversion is function SmartResize(input: unsigned; size: natural) return unsigned; function SmartResize(input: signed; size: natural) return signed; function ToUnsignedAndExpand(input: signed; size: natural) return unsigned; end TypeConversion; package body TypeConversion is -- The .NET behavior is different than that of resize() ("To create a larger vector, the new [leftmost] bit -- positions are filled with the sign bit(ARG'LEFT). When truncating, the sign bit is retained along with the -- rightmost part.") when casting to a smaller type: "If the source type is larger than the destination type, -- then the source value is truncated by discarding its "extra" most significant bits. The result is then -- treated as a value of the destination type." Thus we need to simply truncate when casting down. See: -- https://docs.microsoft.com/en-us/dotnet/csharp/language-reference/language-specification/conversions function SmartResize(input: unsigned; size: natural) return unsigned is begin if (size < input'LENGTH) then return input(size - 1 downto 0); else -- Resize() is supposed to work with little endian numbers: "When truncating, the sign bit is retained -- along with the rightmost part." for signed numbers and "When truncating, the leftmost bits are -- dropped." for unsigned ones. See: http://www.csee.umbc.edu/portal/help/VHDL/numeric_std.vhdl return resize(input, size); end if; end SmartResize; function SmartResize(input: signed; size: natural) return signed is begin if (size < input'LENGTH) then return input(size - 1 downto 0); else return resize(input, size); end if; end SmartResize; function ToUnsignedAndExpand(input: signed; size: natural) return unsigned is variable result: unsigned(size - 1 downto 0); begin if (input >= 0) then return resize(unsigned(input), size); else result := (others => '1'); result(input'LENGTH - 1 downto 0) := unsigned(input); return result; end if; end ToUnsignedAndExpand; end TypeConversion; library ieee; use ieee.std_logic_1164.all; use ieee.numeric_std.all; package SimpleMemory is -- Data conversion functions: function ConvertUInt32ToStdLogicVector(input: unsigned(31 downto 0)) return std_logic_vector; function ConvertStdLogicVectorToUInt32(input : std_logic_vector) return un

Failed test found in: test/Hast.Transformer.Vhdl.Tests/TestResults/test-results.trx Error: System.InvalidOperationException : The invoked method System.UInt16 System.Math::Min(System.UInt16,System.UInt16) can't be found and thus can't be transformed. Did you forget to add an assembly to the list of the assemblies to generate hardware from? Parent entity where the affected code is: System.UInt16 Lombiq.Arithmetics.BitMask::LengthOfRunOfBits(System.UInt16)

Failed test found in: test/Hast.Transformer.Vhdl.Tests/TestResults/test-results.trx Error: Shouldly.ShouldMatchApprovedException : To approve the changes run this command: cp "/home/ubuntu/work/Hastlayer-SDK/Hastlayer-SDK/test/Hast.Transformer.Vhdl.Tests/VerificationTests/VerificationSources/XilinxSamplesVerificationTests.Posit32FusedSampleMatchesApproved.Alveo U50.received.vhdl" "/home/ubuntu/work/Hastlayer-SDK/Hastlayer-SDK/test/Hast.Transformer.Vhdl.Tests/VerificationTests/VerificationSources/XilinxSamplesVerificationTests.Posit32FusedSampleMatchesApproved.Alveo U50.approved.vhdl" ---------------------------- string.Join( string.Empty, hardwareDescriptions.Select(hardwareDescription => hardwareDescription.VhdlSource + hardwareDescription.XdcSource)) should match approved with options: Ignoring line endings "-- Generated by Hastlayer (hastlayer.com) at <date and time removed for approval testing> for the following hardware entry points: -- * System.Void Hast.Samples.SampleAssembly.Posit32FusedCalculator::CalculateFusedSum(Hast.Transformer.SimpleMemory.SimpleMemory) -- VHDL libraries necessary for the generated code to work. These libraries are included here instead of being managed separately in the Hardware Framework so they can be more easily updated. library ieee; use ieee.std_logic_1164.all; use ieee.numeric_std.all; package TypeConversion is function SmartResize(input: unsigned; size: natural) return unsigned; function SmartResize(input: signed; size: natural) return signed; function ToUnsignedAndExpand(input: signed; size: natural) return unsigned; end TypeConversion; package body TypeConversion is -- The .NET behavior is different than that of resize() ("To create a larger vector, the new [leftmost] bit -- positions are filled with the sign bit(ARG'LEFT). When truncating, the sign bit is retained along with the -- rightmost part.") when casting to a smaller type: "If the source type is larger than the destination type, -- then the source value is truncated by discarding its "extra" most significant bits. The result is then -- treated as a value of the destination type." Thus we need to simply truncate when casting down. See: -- https://docs.microsoft.com/en-us/dotnet/csharp/language-reference/language-specification/conversions function SmartResize(input: unsigned; size: natural) return unsigned is begin if (size < input'LENGTH) then return input(size - 1 downto 0); else -- Resize() is supposed to work with little endian numbers: "When truncating, the sign bit is retained -- along with the rightmost part." for signed numbers and "When truncating, the leftmost bits are -- dropped." for unsigned ones. See: http://www.csee.umbc.edu/portal/help/VHDL/numeric_std.vhdl return resize(input, size); end if; end SmartResize; function SmartResize(input: signed; size: natural) return signed is begin if (size < input'LENGTH) then return input(size - 1 downto 0); else return resize(input, size); end if; end SmartResize; function ToUnsignedAndExpand(input: signed; size: natural) return unsigned is variable result: unsigned(size - 1 downto 0); begin if (input >= 0) then return resize(unsigned(input), size); else result := (others => '1'); result(input'LENGTH - 1 downto 0) := unsigned(input); return result; end if; end ToUnsignedAndExpand; end TypeConversion; library ieee; use ieee.std_logic_1164.all; use ieee.numeric_std.all; package SimpleMemory is -- Data conversion functions: function ConvertUInt32ToStdLogicVector(input: unsigned(31 downto 0)) return std_logic_vector; function ConvertStdLogicVectorToUInt32(input : std_logic_v

Failed test found in: test/Hast.Transformer.Vhdl.Tests/TestResults/test-results.trx Error: Shouldly.ShouldMatchApprovedException : To approve the changes run this command: cp "/home/ubuntu/work/Hastlayer-SDK/Hastlayer-SDK/test/Hast.Transformer.Vhdl.Tests/VerificationTests/VerificationSources/XilinxSamplesVerificationTests.Posit32FusedSampleMatchesApproved.Nexys4 DDR.received.vhdl" "/home/ubuntu/work/Hastlayer-SDK/Hastlayer-SDK/test/Hast.Transformer.Vhdl.Tests/VerificationTests/VerificationSources/XilinxSamplesVerificationTests.Posit32FusedSampleMatchesApproved.Nexys4 DDR.approved.vhdl" ---------------------------- string.Join( string.Empty, hardwareDescriptions.Select(hardwareDescription => hardwareDescription.VhdlSource + hardwareDescription.XdcSource)) should match approved with options: Ignoring line endings "-- Generated by Hastlayer (hastlayer.com) at <date and time removed for approval testing> for the following hardware entry points: -- * System.Void Hast.Samples.SampleAssembly.Posit32FusedCalculator::CalculateFusedSum(Hast.Transformer.SimpleMemory.SimpleMemory) -- VHDL libraries necessary for the generated code to work. These libraries are included here instead of being managed separately in the Hardware Framework so they can be more easily updated. library ieee; use ieee.std_logic_1164.all; use ieee.numeric_std.all; package TypeConversion is function SmartResize(input: unsigned; size: natural) return unsigned; function SmartResize(input: signed; size: natural) return signed; function ToUnsignedAndExpand(input: signed; size: natural) return unsigned; end TypeConversion; package body TypeConversion is -- The .NET behavior is different than that of resize() ("To create a larger vector, the new [leftmost] bit -- positions are filled with the sign bit(ARG'LEFT). When truncating, the sign bit is retained along with the -- rightmost part.") when casting to a smaller type: "If the source type is larger than the destination type, -- then the source value is truncated by discarding its "extra" most significant bits. The result is then -- treated as a value of the destination type." Thus we need to simply truncate when casting down. See: -- https://docs.microsoft.com/en-us/dotnet/csharp/language-reference/language-specification/conversions function SmartResize(input: unsigned; size: natural) return unsigned is begin if (size < input'LENGTH) then return input(size - 1 downto 0); else -- Resize() is supposed to work with little endian numbers: "When truncating, the sign bit is retained -- along with the rightmost part." for signed numbers and "When truncating, the leftmost bits are -- dropped." for unsigned ones. See: http://www.csee.umbc.edu/portal/help/VHDL/numeric_std.vhdl return resize(input, size); end if; end SmartResize; function SmartResize(input: signed; size: natural) return signed is begin if (size < input'LENGTH) then return input(size - 1 downto 0); else return resize(input, size); end if; end SmartResize; function ToUnsignedAndExpand(input: signed; size: natural) return unsigned is variable result: unsigned(size - 1 downto 0); begin if (input >= 0) then return resize(unsigned(input), size); else result := (others => '1'); result(input'LENGTH - 1 downto 0) := unsigned(input); return result; end if; end ToUnsignedAndExpand; end TypeConversion; library ieee; use ieee.std_logic_1164.all; use ieee.numeric_std.all; package SimpleMemory is -- Data conversion functions: function ConvertUInt32ToStdLogicVector(input: unsigned(31 downto 0)) return std_logic_vector; function ConvertStdLogicVectorToUInt32(input : std_logic

Failed test found in: test/Hast.Transformer.Vhdl.Tests/TestResults/test-results.trx Error: System.InvalidOperationException : The invoked method System.UInt16 System.Math::Min(System.UInt16,System.UInt16) can't be found and thus can't be transformed. Did you forget to add an assembly to the list of the assemblies to generate hardware from? Parent entity where the affected code is: System.UInt16 Lombiq.Arithmetics.BitMask::LengthOfRunOfBits(System.UInt16)

Failed test found in: test/Hast.Transformer.Vhdl.Tests/TestResults/test-results.trx Error: System.InvalidOperationException : The invoked method System.UInt16 System.Math::Min(System.UInt16,System.UInt16) can't be found and thus can't be transformed. Did you forget to add an assembly to the list of the assemblies to generate hardware from? Parent entity where the affected code is: System.UInt16 Lombiq.Arithmetics.BitMask::LengthOfRunOfBits(System.UInt16)