Consolidate READMEs

README.md

@@ -2,6 +2,7 @@ slang - SystemVerilog Language Services
 =======================================
 ![](https://github.com/MikePopoloski/slang/workflows/CI%20Build/badge.svg)
 [![codecov](https://codecov.io/gh/MikePopoloski/slang/branch/master/graph/badge.svg)](https://codecov.io/gh/MikePopoloski/slang)
+[![PyPI](https://img.shields.io/pypi/v/pyslang.svg)](https://pypi.org/project/pyslang/)
 [![License: MIT](https://img.shields.io/badge/License-MIT-yellow.svg)](https://github.com/MikePopoloski/slang/blob/master/LICENSE)
 [![Join the chat at https://gitter.im/MikePopoloski/slang](https://badges.gitter.im/MikePopoloski/slang.svg)](https://gitter.im/MikePopoloski/slang?utm_source=badge&utm_medium=badge&utm_campaign=pr-badge&utm_content=badge)
 
@@ -40,6 +41,84 @@ If you're looking to use slang as a library, please read through the [developer
 
 Experiment with parsing, type checking, and error detection live [on the web](https://sv-lang.com/explore/) (inspired by Matt Godbolt's excellent [Compiler Explorer](https://godbolt.org/)).
 
+### Python Bindings
+
+This project also includes Python bindings for the library, which can be installed via PyPI:
+```
+pip install pyslang
+```
+or, to update your installed version to the latest release:
+```
+pip install -U pyslang
+```
+or, to checkout and install a local build:
+```
+git clone https://github.com/MikePopoloski/slang.git
+cd slang
+pip install .
+```
+
+#### Example Python Usage
+
+Given a 'test.sv' source file:
+```sv
+module memory(
+    address,
+    data_in,
+    data_out,
+    read_write,
+    chip_en
+  );
+
+  input wire [7:0] address, data_in;
+  output reg [7:0] data_out;
+  input wire read_write, chip_en;
+
+  reg [7:0] mem [0:255];
+
+  always @ (address or data_in or read_write or chip_en)
+    if (read_write == 1 && chip_en == 1) begin
+      mem[address] = data_in;
+  end
+
+  always @ (read_write or chip_en or address)
+    if (read_write == 0 && chip_en)
+      data_out = mem[address];
+    else
+      data_out = 0;
+
+endmodule
+```
+
+We can use slang to load the syntax tree and inspect it:
+```py
+import pyslang
+
+tree = pyslang.SyntaxTree.fromFile('test.sv')
+mod = tree.root.members[0]
+print(mod.header.name.value)
+print(mod.members[0].kind)
+print(mod.members[1].header.dataType)
+```
+
+```
+memory
+SyntaxKind.PortDeclaration
+reg [7:0]
+```
+
+We can also evaluate arbitrary SystemVerilog expressions:
+```py
+session = pyslang.ScriptSession()
+session.eval("logic bit_arr [16] = '{0:1, 1:1, 2:1, default:0};")
+result = session.eval("bit_arr.sum with ( int'(item) );")
+print(result)
+```
+
+```
+3
+```
+
 ### Contact & Support
 
 If you encounter a bug, have questions, or want to contribute, please get in touch by opening a GitHub issue or discussion thread.

pyproject.toml

@@ -2,7 +2,7 @@
 name = "pyslang"
 version = "7.0.1"
 description = "Python bindings for slang, a library for compiling SystemVerilog"
-readme = {file = "pyslang/README.md", content-type = "text/markdown"}
+readme = {file = "README.md", content-type = "text/markdown"}
 authors = [{name = "Mike Popoloski"}]
 keywords = ["slang", "verilog", "systemverilog", "parsing", "compiler", "eda"]
 license = {file = "LICENSE"}