Merge branch 'nessi.no-2023.06' of github-trz:NorESSI/software-layer …

…into sync_nessi_eessi_test_pr
NorESSI · Jan 22, 2024 · ca07b2c · ca07b2c
2 parents 89a6af5 + deb8d94
commit ca07b2c
Showing 1 changed file with 2 additions and 1 deletion.
diff --git a/init/arch_specs/eessi_arch_x86.spec b/init/arch_specs/eessi_arch_x86.spec
@@ -1,6 +1,7 @@
 # x86_64 CPU architecture specifications
 # Software path in EESSI 	| Vendor ID 	| List of defining CPU features
-"x86_64/intel/haswell"		"GenuineIntel"	"avx2 fma" 		# Intel Haswell, Broadwell
+"x86_64/intel/haswell"		"GenuineIntel"	"avx2 fma"		# Intel Haswell
+"x86_64/intel/broadwell"	"GenuineIntel"	"avx2 fma rdseed adx"	# Intel Broadwell
 "x86_64/intel/skylake_avx512"	"GenuineIntel"	"avx2 fma avx512f avx512bw avx512cd avx512dq avx512vl"	# Intel Skylake, Cascade Lake
 "x86_64/amd/zen2"		"AuthenticAMD"	"avx2 fma"		# AMD Rome
 "x86_64/amd/zen3"		"AuthenticAMD"	"avx2 fma vaes"		# AMD Milan, Milan-X