Preprocess: skip loadEvent for single-core #561
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After optimized by Squash, DPIC bytes of LoadEvent accounts for nearly 30% of total. However in do_load_check(difftest.cpp), LoadEvent will only be used when numCores greater than 1, so we skip LoadEvent for singleCore.
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BTW, according to DPIC data recorded by Query, Increment transmitting works for other bundle taking up major part of DPIC, including RegState/CSR/RefillEvent, but not LoadEvent. |
Maybe just leave DiffLoadEvent ungenerated for single-core? |
Someone may need to generated these C++ interfaces in other use cases. So if we generate them but with a macro |
* commit: b537f528bbb9e400b9d0da8756219a5f6d107be9 Including: * fix(xdma): remove replicate data parsing when USE_THREAD_MEMPOOL (OpenXiangShan/difftest#555) * Preprocess: move from Gateway to seperate file (OpenXiangShan/difftest#559) * Batch: collect from different groups in one cycle to reduce gates (OpenXiangShan/difftest#558) * feat(query): support query for difftest-dpic data (OpenXiangShan/difftest#557) * PerfCnt: count and sum for each DiffState when Batch (OpenXiangShan/difftest#560) * Preprocess: skip loadEvent for single-core (OpenXiangShan/difftest#561) * vcs: Refact DifftestEndpoint by split large always-block into piece (OpenXiangShan/difftest#565) * vcs: Ensure correct execution order of difftest DPI calls (OpenXiangShan/difftest#563) * Batch: disable split strategy for FPGA to reduce gates (OpenXiangShan/difftest#562) * fix(elfloader): Sort phdr entries by paddr before return to readFromElf() (OpenXiangShan/difftest#566) * Batch: rename BatchInterval to BatchStep, move to tail of StepInfo (OpenXiangShan/difftest#564)
After optimized by Squash, DPIC bytes of LoadEvent accounts for nearly 30% of total. However in do_load_check(difftest.cpp), LoadEvent will only be used when numCores greater than 1, so we skip LoadEvent for singleCore.