Uop queue

Makefile

@@ -1,5 +1,8 @@
 ROOT := $(shell pwd)
 
+TEST_FILE_NAME ?= add
+
+
 RISCV := $(ROOT)/source_code
 RISCV_CORE := $(RISCV)/standard_core
 PIPELINE := $(RISCV)/pipelines
@@ -56,6 +59,13 @@ config:
 	@echo "----------------------"
 	@python3 scripts/config_core.py example.yml
 
+test_asm_file:
+	python3 compile_asm_for_self.py verification/self-tests/RV32I/$(TEST_FILE_NAME).S
+	riscv64-unknown-elf-objcopy -O binary sim_out/RV32I/$(TEST_FILE_NAME)/$(TEST_FILE_NAME).elf sim_out/RV32I/$(TEST_FILE_NAME)/$(TEST_FILE_NAME).bin
+	./rvb_out/sim-verilator/Vtop_core sim_out/RV32I/$(TEST_FILE_NAME)/$(TEST_FILE_NAME).bin
+
+
+
 verilate: config
 	@fusesoc --cores-root . run --setup --build --build-root rvb_out --target sim --tool verilator socet:riscv:RISCVBusiness --make_options='-j'
 	@echo "------------------------------------------------------------------"

RISCVBusiness.core

@@ -9,7 +9,7 @@ filesets:
             - "socet:bus-components:ahb_if"
             - "socet:bus-components:apb_if"
             - "socet:riscv:packages"
-            - "socet:riscv:stage3"
+            - "socet:riscv:stage4"
             - "socet:riscv:priv"
             - "socet:riscv:caches"
             #- "socet:riscv:risc_mgmt"

run_tests.py

@@ -41,6 +41,7 @@
 SUPPORTED_TEST_TYPES = ['asm', 'c', 'selfasm', "sparce", ""]
 SPARCE_MODULES = ['sparce_svc', 'sparce_sprf', 'sparce_sasa_table', 'sparce_psru', 'sparce_cfid']
 TEST_TYPE = ""
+ELF2HEX_COMMAND = "/home/ecegrid/a/socpub/Public/riscv_dev/riscv_installs/RV_current/bin/elf2hex"
 # Change this variable to the filename (minus extension)
 # of the top level file for your project. This should
 # match the file name given in the top level wscript
@@ -63,7 +64,7 @@ def parse_arguments():
     TEST_TYPE = args.test_type
 
     if TEST_TYPE not in SUPPORTED_TEST_TYPES:
-        print "ERROR: " + TEST_TYPE + " is not a supported test type"
+        print("ERROR: " + TEST_TYPE + " is not a supported test type.")
         sys.exit(1)
 
     if TEST_TYPE == "":
@@ -76,7 +77,7 @@ def parse_arguments():
         SUPPORTED_ARCHS = [a.split('/'+test_file_dir)[1] for a in SUPPORTED_ARCHS]
         if ARCH not in SUPPORTED_ARCHS:
            if test_type != 'sparce':
-              print "ERROR: No " + test_type + " tests exist for " + ARCH
+              print("ERROR: No " + test_type + " tests exist for " + ARCH)
               sys.exit(1)
         else:
           if TEST_TYPE == 'sparce':
@@ -88,7 +89,7 @@ def parse_arguments():
           SUPPORTED_ARCHS = glob.glob('./verification/' + test_file_dir + '*')
           SUPPORTED_ARCHS = [a.split('/'+test_file_dir)[1] for a in SUPPORTED_ARCHS]
           if ARCH not in SUPPORTED_ARCHS:
-            print "ERROR: No " + TEST_TYPE + " tests exist for " + ARCH
+            print("ERROR: No " + TEST_TYPE + " tests exist for " + ARCH)
             sys.exit(1)
 
 # compile_asm takes a file_name as input and assembles the file pointed
@@ -116,7 +117,7 @@ def compile_asm(file_name):
         return -1
 
     # create an meminit.hex file from the elf file produced above
-    cmd_arr = ['elf2hex', '8', '65536', output_name, '2147483648']
+    cmd_arr = [ELF2HEX_COMMAND, '8', '65536', output_name, '2147483648']
     hex_file_loc = output_dir + 'meminit.hex'
     with open(hex_file_loc, 'w') as hex_file:
         failure = subprocess.call(cmd_arr, stdout=hex_file)
@@ -151,7 +152,7 @@ def compile_asm_for_self(file_name):
         return -1
 
     # create an meminit.hex file from the elf file produced above
-    cmd_arr = ['elf2hex', '8', '65536', output_name, '2147483648']
+    cmd_arr = [ELF2HEX_COMMAND, '8', '65536', output_name, '2147483648']
     hex_file_loc = output_dir + 'meminit.hex'
     with open(hex_file_loc, 'w') as hex_file:
         failure = subprocess.call(cmd_arr, stdout=hex_file)
@@ -403,7 +404,7 @@ def run_sim(file_name):
         log.close()
         log = open(output_dir + 'waf_output.log', 'r')
         for line in log:
-            print line
+            print(line)
         return -2
     subprocess.call(['mv', 'build/cpu.hex', output_dir + 'cpu.hex'])
     if(os.path.exists('build/stats.txt')):
@@ -426,7 +427,7 @@ def run_self_sim(file_name):
         log.close()
         log = open(output_dir + 'waf_output.log', 'r')
         for line in log:
-            print line
+            print(line)
         return -2
     if(os.path.exists('build/stats.txt')):
         subprocess.call(['mv', 'build/stats.txt', output_dir + 'stats.txt'])
@@ -462,10 +463,10 @@ def compare_results(f):
     cmd_arr += [output_dir + short_name + '_sim.trace']
     #subprocess.call(cmd_arr)
     if failure:
-        print fail_msg
+        print(fail_msg)
         return 1
     else:
-        print pass_msg
+        print(pass_msg)
         return 0
 
 def check_results(f):
@@ -480,10 +481,10 @@ def check_results(f):
         waf_output_text = waf_output.read()
         match = re.search(pattern, waf_output_text)
         if match:
-            print pass_msg
+            print(pass_msg)
             return 0
         else:
-            print fail_msg
+            print(fail_msg)
             return 1
 
 def run_asm():
@@ -492,7 +493,7 @@ def run_asm():
         files = glob.glob("./verification/"+"asm"+"-tests/"+ARCH+"/*.S")
     else:
         files = glob.glob("./verification/"+"asm"+"-tests/"+ARCH+"/"+FILE_NAME+"*.S")
-    print "Starting asm tests..."
+    print("Starting asm tests...")
     for f in files:
         if 'asicfab' in os.environ['HOSTNAME']:
             # Need to do the work on EE256
@@ -530,24 +531,24 @@ def run_asm():
             ret = compile_asm(f)
             if ret != 0:
                 if ret == -1:
-                    print "An error has occured during GCC compilation"
+                    print("An error has occured during GCC compilation")
                 elif ret == -2:
-                    print "An error has occured converting elf to hex"
+                    print("An error has occured converting elf to hex")
                 sys.exit(1)
             clean_init_hex(f)
             ret = run_spike_asm(f)
             if ret != 0:
-                print "An error has occurred during running Spike"
+                print("An error has occurred during running Spike")
                 sys.exit(ret)
 
         clean_spike_output(f)
         clean_init_hex(f)
         ret = run_sim(f)
         if ret != 0:
             if ret == -1:
-              print "An error has occurred while setting waf's top level"
+              print("An error has occurred while setting waf's top level")
             elif ret == -2:
-                print "An error has occurred while running " + f
+                print("An error has occurred while running " + f)
             sys.exit(ret)
         clean_sim_trace(f)
         failures += compare_results(f)
@@ -556,7 +557,7 @@ def run_asm():
 
 def run_sparce():
    failures = 0
-   print "starting sparce module tests..."
+   print("starting sparce module tests...")
    for module in SPARCE_MODULES:
 
       pass_msg = '{0:<40}{1:>20}'.format(module,START_GREEN + '[PASSED]' + END_COLOR)
@@ -572,7 +573,7 @@ def run_sparce():
       cmd_arr = ['waf', 'configure', '--top_level=' + module]
       failure = subprocess.call(cmd_arr, stdout=FNULL)
       if failure:
-         print "Error configuring test for " + module
+         print("Error configuring test for " + module)
          failures += 1
       else:
          cmd_arr = ['waf', 'verify_source']
@@ -583,11 +584,11 @@ def run_sparce():
             log.close()
             log = open(output_dir + 'waf_output.log', 'r')
             for line in log:
-                print line
+                print(line)
             failures += 1
-            print fail_msg
+            print(fail_msg)
          else:
-            print pass_msg
+            print(pass_msg)
 
    return failures
 
@@ -598,7 +599,7 @@ def run_selfasm():
     else:
         loc = "./verification/self-tests/" + ARCH + "/" + FILE_NAME + "*.S"
         files = glob.glob(loc)
-    print "Starting self tests..."
+    print("Starting self tests...")
     for f in files:
         # TODO: Fix timer error
         #if 'timer2' in f: continue
@@ -638,18 +639,18 @@ def run_selfasm():
             ret = compile_asm_for_self(f)
             if ret != 0:
                 if ret == -1:
-                    print "An error has occured during GCC compilation"
+                    print("An error has occured during GCC compilation")
                 elif ret == -2:
-                    print "An error has occured converting elf to hex"
+                    print("An error has occured converting elf to hex")
                 sys.exit(ret)
 
         clean_init_hex_for_self(f)
         ret = run_self_sim(f)
         if ret != 0:
             if ret == -1:
-                print "An error has occured while seting waf's top level"
+                print("An error has occured while seting waf's top level")
             elif ret == -2:
-                print "An error has occured while running " + f
+                print("An error has occured while running " + f)
             sys.exit(ret)
         failures += check_results(f)
     return failures
@@ -661,7 +662,7 @@ def run_c():
     else:
         loc = "./verification/c-tests/" + ARCH + "/" + FILE_NAME + "*.c"
         files = glob.glob(loc)
-    print "Starting c tests..."
+    print("Starting c tests...")
     for f in files:
         if 'asicfab' in os.environ['HOSTNAME']:
             # Do work remotely
@@ -696,17 +697,17 @@ def run_c():
             ret = compile_c(f)
             if ret != 0:
                 if ret == -1:
-                    print "An error has occured during GCC compilation"
+                    print("An error has occured during GCC compilation")
                 elif ret == -2:
-                    print "An error has occured converting elf to hex"
+                    print("An error has occured converting elf to hex")
                 sys.exit(ret)
         clean_init_hex_for_self(f)
         ret = run_self_sim(f)
         if ret != 0:
             if ret == -1:
-                print "An error has occured while seting waf's top level"
+                print("An error has occured while seting waf's top level")
             elif ret == -2:
-                print "An error has occured while running " + f
+                print("An error has occured while running " + f)
             sys.exit(ret)
         failures += check_results(f)
     return failures
@@ -732,5 +733,5 @@ def run_c():
       failures += run_c()
       failures += run_sparce()
     else:
-        print "To be implemented"
+        print("To be implemented")
     sys.exit(failures)

run_tests_config.json

@@ -1,7 +1,7 @@
 {
   "arch": "RV32I",
   "abi": "ilp32",
-  "xlen": "rv32i",
+  "xlen": "rv32im_zicsr_zifencei",
   "test_type": "self-tests",
   "top_level": "RISCVBusiness_self_test",
   "test_filenames": ["*.S"],
@@ -12,4 +12,4 @@
   "asm_env": "./verification/asm-env/selfasm",
   "sim_dir": "./sim_out",
   "link_file": "link.ld"
-}
+}

source_code/include/control_unit_if.vh

@@ -37,7 +37,7 @@ interface control_unit_if;
   logic [1:0] alu_a_sel, alu_b_sel;
   logic [2:0] w_sel;
   logic [4:0] shamt;
-  logic [4:0] rd;
+  regsel_t rd;
   logic [11:0] imm_I, imm_S;
   logic [20:0] imm_UJ;
   logic [12:0] imm_SB;
@@ -66,4 +66,4 @@ interface control_unit_if;
   );
 
 endinterface
-`endif
+`endif

source_code/include/rv32i_reg_file_if.vh

@@ -30,7 +30,7 @@ interface rv32i_reg_file_if();
   import rv32i_types_pkg::*;
 
   word_t        w_data, rs1_data, rs2_data;
-  logic   [4:0] rs1, rs2, rd;
+  regsel_t      rs1, rs2, rd;
   logic         wen;
 
   modport rf (
@@ -44,4 +44,4 @@ interface rv32i_reg_file_if();
 
 endinterface
 
-`endif //RV32I_REG_FILE_IF_VH
+`endif //RV32I_REG_FILE_IF_VH

source_code/include/rv32v_align_unit_if.vh

@@ -0,0 +1,45 @@
+/*
+*   Copyright 2023 Purdue University
+*   
+*   Licensed under the Apache License, Version 2.0 (the "License");
+*   you may not use this file except in compliance with the License.
+*   You may obtain a copy of the License at
+*   
+*       http://www.apache.org/licenses/LICENSE-2.0
+*   
+*   Unless required by applicable law or agreed to in writing, software
+*   distributed under the License is distributed on an "AS IS" BASIS,
+*   WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
+*   See the License for the specific language governing permissions and
+*   limitations under the License.
+*
+*
+*   Filename:     include/rv32v_align_unit_if.vh
+*
+*   Created by:   Om Gupta
+*   Email:        [email protected]
+*   Date Created: 11/03/2023
+*   Description:  Interface for the data alignment unit
+*/
+
+`ifndef RV32V_ALIGN_UNIT_IF_VH
+`define RV32V_ALIGN_UNIT_IF_VH
+
+interface rv32v_align_unit_if();
+
+  import rv32v_types_pkg::*;
+
+  word_t vin_data, vout_data;
+
+  sew_t vsew_src;
+  logic [1:0] velemoffset;
+  logic vsignext;  // 0 -> zero extend; 1 -> sign extend
+
+  modport vau(
+    input vin_data, vsew_src, velemoffset, vsignext,
+    output vout_data
+  );
+
+endinterface
+
+`endif //RV32V_ALIGN_UNIT_IF_VH