Workaround to ensure Docker can find files only under HOME or PWD

README.md

@@ -3,6 +3,8 @@
 HDL converter (between VHDL, SystemVerilog and/or Verilog), based on [GHDL](https://github.com/ghdl/ghdl), [Yosys](https://github.com/YosysHQ/yosys), [Synlig](https://github.com/chipsalliance/synlig) and the plugins [ghdl-yosys-plugin](https://github.com/ghdl/ghdl-yosys-plugin) and [yosys-slang](https://github.com/povik/yosys-slang).
 It relies on [Docker](https://docs.docker.com/get-docker) and [PyFPGA containers](https://github.com/PyFPGA/containers).
 
+> Known limitation: the files must be located either under the `$HOME` directory or under the current working directory (`$PWD`) for Docker to be able to find and access them.
+
 * `vhdl2vhdl`: converts from a newer VHDL to VHDL'93 (using `ghdl`).
 * `vhdl2vlog`: converts from VHDL to Verilog (backends: `ghdl` or `yosys`).
 * `slog2vlog`: converts from SystemVerilog to Verilog (frontends: `slang`, `synlig` or `yosys`).

hdlconv/templates/docker.jinja

@@ -1,2 +1,2 @@
 CONTAINER="ghcr.io/pyfpga/synthesis"
-DOCKER="docker run --rm -v $HOME:$HOME -w $PWD --user $(id -u):$(id -g) $CONTAINER"
+DOCKER="docker run --rm -v $HOME:$HOME -v $PWD:$PWD -w $PWD --user $(id -u):$(id -g) $CONTAINER"