Skip to content

Commit

Permalink
Add support for S and T gates in generic qdevice
Browse files Browse the repository at this point in the history
Add test to check all single qubit gates in generic qdevice
  • Loading branch information
mkvanhooft committed Dec 16, 2024
1 parent a5b88b1 commit f8d7143
Show file tree
Hide file tree
Showing 3 changed files with 65 additions and 1 deletion.
1 change: 1 addition & 0 deletions CHANGELOG.md
Original file line number Diff line number Diff line change
Expand Up @@ -4,6 +4,7 @@ CHANGELOG
2024-12-16 (0.13.4)
------------------
- Bugfix for simulation time not resetting between different calls of the `squidasm.run.stack.run.run` method
- Add support for S and T gates in generic qdevice

2024-11-18 (0.13.3)
------------------
Expand Down
10 changes: 10 additions & 0 deletions squidasm/sim/stack/processor.py
Original file line number Diff line number Diff line change
Expand Up @@ -21,6 +21,8 @@
INSTR_ROT_X,
INSTR_ROT_Y,
INSTR_ROT_Z,
INSTR_S,
INSTR_T,
INSTR_X,
INSTR_Y,
INSTR_Z,
Expand Down Expand Up @@ -684,6 +686,14 @@ def _interpret_single_qubit_instr(
prog = QuantumProgram()
prog.apply(INSTR_K, qubit_indices=[phys_id])
yield self.qdevice.execute_program(prog)
elif isinstance(instr, vanilla.GateSInstruction):
prog = QuantumProgram()
prog.apply(INSTR_S, qubit_indices=[phys_id])
yield self.qdevice.execute_program(prog)
elif isinstance(instr, vanilla.GateTInstruction):
prog = QuantumProgram()
prog.apply(INSTR_T, qubit_indices=[phys_id])
yield self.qdevice.execute_program(prog)
else:
raise RuntimeError(f"Unsupported instruction {instr}")

Expand Down
55 changes: 54 additions & 1 deletion tests/stack/test_single_node.py
Original file line number Diff line number Diff line change
Expand Up @@ -7,6 +7,7 @@
from netqasm.lang.parsing import parse_text_subroutine
from netsquid.components import QuantumProcessor
from netsquid.qubits import ketstates, qubitapi
from netsquid_netbuilder.modules.qdevices.generic import GenericQDeviceConfig
from netsquid_netbuilder.modules.qdevices.nv import NVQDeviceConfig
from netsquid_netbuilder.util.network_generation import create_single_node_network

Expand All @@ -16,7 +17,7 @@
from squidasm.sim.stack.host import Host


class TestSingleNode(unittest.TestCase):
class TestSingleNodeNV(unittest.TestCase):
def setUp(self) -> None:
ns.sim_reset()
config = NVQDeviceConfig.perfect_config()
Expand Down Expand Up @@ -155,5 +156,57 @@ def check_qmem(qdevice: QuantumProcessor) -> None:
self._check_qmem = check_qmem


class TestSingleNodeGeneric(unittest.TestCase):
def setUp(self) -> None:
ns.sim_reset()
config = GenericQDeviceConfig.perfect_config()
network_cfg = create_single_node_network(
qdevice_typ="generic", qdevice_cfg=config
)
self.network = _setup_network(network_cfg)
self._node = self.network.stacks["Alice"]

self._host: Optional[Type[Host]] = None

def tearDown(self) -> None:
self._node.subprotocols[f"{self._node.name}_host_protocol"] = self._host(
self._node.host_comp
)
_run(self.network)

def test_quantum_instructions(self):
SUBRT_1 = """
# NETQASM 1.0
# APPID 0
set Q0 0
qalloc Q0
init Q0
x Q0
y Q0
z Q0
h Q0
s Q0
k Q0
t Q0
rot_x Q0 16 4
rot_y Q0 8 1
rot_z Q0 16 2
"""

class TestHost(Host):
def run(self) -> Generator[EventExpression, None, None]:
self.send_qnos_msg(bytes(InitNewAppMessage(max_qubits=2)))
app_id = yield from self.receive_qnos_msg()
assert app_id == 0
subroutine = parse_text_subroutine(SUBRT_1)
subroutine.app_id = app_id
self.send_qnos_msg(bytes(SubroutineMessage(subroutine)))
app_mem = yield from self.receive_qnos_msg()
assert isinstance(app_mem, AppMemory)
assert app_mem.get_reg_value("Q0") == 0

self._host = TestHost


if __name__ == "__main__":
unittest.main()

0 comments on commit f8d7143

Please sign in to comment.