Skip to content
New issue

Have a question about this project? Sign up for a free GitHub account to open an issue and contact its maintainers and the community.

Sign up for GitHub

By clicking “Sign up for GitHub”, you agree to our terms of service and privacy statement. We’ll occasionally send you account related emails.

Already on GitHub? Sign in to your account

Jump to bottom

Improve chip info logic. #581

Open
wants to merge 17 commits into
base: develop
Choose a base branch
from
Open

Improve chip info logic. #581

wants to merge 17 commits into from

Conversation

xuchen-amd
Copy link
Contributor

This PR:

  • Purpose: centralize and unify the source of system/chip related information.
  • Added YAML file src/utils/mi_gpu_data.yaml to promote readability and scalability for future supports.
  • Added src/utils/mi_gpu_data.py for system/machine spec retrievals.
  • Removed unused data structures and functions.
  • Added debug messages and fixed formatting.
  • Passed local ctest.

WIP:

  • Instantiate MIGPU singleton for the current system for easy references.
  • Display graphic information of the system by visualize the MIGPU singleton using Dash.

@xuchen-amd xuchen-amd marked this pull request as draft February 25, 2025 20:34
@xuchen-amd xuchen-amd marked this pull request as ready for review February 26, 2025 20:06
feizheng10
feizheng10 reviewed Feb 27, 2025
View reviewed changes
Copy link
Contributor

@feizheng10 feizheng10 left a comment

Choose a reason for hiding this comment

The reason will be displayed to describe this comment to others. Learn more.

Cool! The whole structure is much better than before!

xuchen-amd and others added 9 commits February 27, 2025 17:12
@xuchen-amd
Merge branch 'develop' into improve_chip_info_logic
c5f79b0
@xuchen-amd
Add fixes.
5b6a5f7
@vedithal-amd
Fix post analysis gui in standalone binary (ROCm#591)
8cb4c56 
* Fix post analysis gui in standalone binary

* Add post analysis gui assets and required server libraries for GUI
  server and web page

* Add port forwarding to docker test compose

* Update README me to use `docker compose up` instead of `docker compose run`
  to run containers with port forwarding and to leverage other
  functionalities of docker compose
@xuchen-amd
Fix rocprofv1 output processing. (ROCm#588)
f2d6150
@xuchen-amd
Disable --kokkos-trace in rocprof-compute (ROCm#594)
9a92c7e 
.
@xuchen-amd
Fix number of XCDs for MI300X CPX (core partition).
d083ea9
@xuchen-amd
Add support for memory partition mode.
7c4547e
@xuchen-amd
Merge branch 'develop' into improve_chip_info_logic
dab2bb7
@xuchen-amd
Update spec yaml with memory partition info.
4b77299
@xuchen-amd xuchen-amd requested a review from feizheng10 March 6, 2025 19:37
@vedithal-amd vedithal-amd requested a review from a team as a code owner March 7, 2025 16:28
feizheng10
feizheng10 reviewed Mar 7, 2025
View reviewed changes
src/utils/utils.py
@@ -1029,51 +1031,6 @@ def flatten_tcc_info_across_xcds(file, xcds, tcc_channel_per_xcd):
return df


def total_xcds(archname, compute_partition):
Copy link
Contributor

Choose a reason for hiding this comment

The reason will be displayed to describe this comment to others. Learn more.

We might want to keep total_xcds on top of the new get_mi300_num_xcds() for any other archs even they don't have the concept of "xcd". Think about future arch, people still probably want to call the unified interface from total_xcds

Sign up for free to join this conversation on GitHub. Already have an account? Sign in to comment
Reviewers

@feizheng10 feizheng10 feizheng10 left review comments

@koomie koomie Awaiting requested review from koomie koomie is a code owner

@coleramos425 coleramos425 Awaiting requested review from coleramos425 coleramos425 is a code owner

@dgaliffiAMD dgaliffiAMD Awaiting requested review from dgaliffiAMD dgaliffiAMD is a code owner

At least 1 approving review is required to merge this pull request.

Assignees
No one assigned
Labels
None yet
Projects
None yet
Milestone
No milestone
Development

Successfully merging this pull request may close these issues.
3 participants
@xuchen-amd @feizheng10 @vedithal-amd