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Commits on Jul 15, 2020

• First commit on the release/11.x branch.

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Commits on Jul 16, 2020

• Revert "[InstSimplify] Remove select ?, undef, X -> X and select ?, X, undef -> X transforms" and subsequent patches

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• [InstCombine] update datalayout in test file; NFC

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• [InstCombine] prevent infinite looping in or-icmp fold (PR46712)

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Commits on Jul 17, 2020

• Temporarily Revert "[AssumeBundles] Use operand bundles to encode alignment assumptions"

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• [X86] Add test case for PR46455.

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• [X86] Move integer hadd/hsub formation into a helper function shared by combineAdd and combineSub.

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• Add -flang flag to the test-release.sh script

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• [docs] Add Deprecated section to ReleaseNotes

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• Remove TwoAddressInstructionPass::sink3AddrInstruction.

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Commits on Jul 18, 2020

• [RelocationResolver] Support R_PPC_REL32 & R_PPC64_REL{32,64}

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• [RelocationResolver] Support R_AARCH64_PREL32

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Commits on Jul 20, 2020

• [InstCombine] Fix replace select with Phis when branch has the same labels

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• [InstCombine][Test] Test for fix of replacing select with Phis when branch has the same labels

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• [RISCV] Add support for -mcpu option.

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• [X86] Teach assembler parser to accept lsl and lar with a 64 or 32 source register when the destination is a 64 register.

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• [X86] Allow lsl/lar to be parsed with a GR16, GR32, or GR64 as source register.

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• [ms] [llvm-ml] Remove unused function

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Commits on Jul 21, 2020

• [ConstantFolding] check applicability of AllOnes constant creation first

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• [LLVMgold.so] -plugin-opt=save-temps: save combined module to .lto.o instead of .o

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• [LLVMgold.so][test] Fix tests after D84132/55fa315b0352

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Commits on Jul 22, 2020

• [PowerPC] Precommit test case for PR46759. NFC.

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• [PowerPC] Fix wrong codegen when stack pointer has to realign in prologue

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• [PowerPC] Fix wrong codegen when stack pointer has to realign performing dynalloc

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Commits on Jul 23, 2020

• [SCEV] Remove premature assert. PR46786

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• Drop the npm run line from llvm/test/Analysis/ScalarEvolution/pr46786.ll

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• [InstCombine] Add test for PR46680 (NFC)

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• [InstCombine] Fix store merge worklist management (PR46680)

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• [X86][AVX] getTargetShuffleMask - don't decode VBROADCAST(EXTRACT_SUBVECTOR(X,0)) patterns.

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Commits on Jul 27, 2020

• [RISCV] Add matching of codegen patterns to RISCV Bit Manipulation Zbb asm instructions

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• [RISCV] Add matching of codegen patterns to RISCV Bit Manipulation Zbp asm instructions

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• [RISCV] Add matching of codegen patterns to RISCV Bit Manipulation Zbbp asm instructions

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• [RISCV] Add matching of codegen patterns to RISCV Bit Manipulation Zbs asm instructions

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• [RISCV] Add matching of codegen patterns to RISCV Bit Manipulation Zbt asm instructions

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• [MC] [COFF] Make sure that weak external symbols are undefined symbols

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• [llvm-lib] Support adding short import library objects with llvm-lib

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• [LegalizeTypes] Teach DAGTypeLegalizer::GenWidenVectorLoads to pad with undef if needed when concatenating small or loads to match a larger load

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• [PowerPC] Fix computation of offset for load-and-splat for permuted loads

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• [PowerPC][NFC] Fix an assert that cannot trip from 7d076e19e31a

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• [JumpThreading] ProcessBranchOnXOR(): bailout if any pred ends in indirect branch (PR46857)

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• [BasicAA] Add additional negative phi tests. NFC

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• [BasicAA] Fix -basicaa-recphi for geps with negative offsets

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• Drop the 'git' suffix from various version variables

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Commits on Jul 28, 2020

• [X86] Detect if EFLAGs is live across XBEGIN pseudo instruction. Add it as livein to the basic blocks created when expanding the pseudo

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• [X86][SSE] Add additional (f)add(shuffle(x,y),shuffle(x,y)) tests for D83789

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• [X86][SSE] Attempt to match OP(SHUFFLE(X,Y),SHUFFLE(X,Y)) -> SHUFFLE(HOP(X,Y))

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Commits on Jul 29, 2020

• [InstCombine] avoid crashing on vector constant expression (PR46872)

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• [AMDGPU] Don't combine memory intrs to v3i16

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Commits on Jul 31, 2020

• Add flang to export.sh to it gets source tarballs in releases

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• [AArch64][SVE] Add support for trunc to <vscale x N x i1>.

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• [AArch64][SVE] Fix PCS for functions taking/returning scalable types.

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• [AArch64][SVE] Correctly allocate scavenging slot in presence of SVE.

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• [AArch64][SVE] Teach copyPhysReg to copy ZPR2/3/4.

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• [AArch64][SVE] Don't support fixedStack for SVE objects.

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• [AArch64][SVE] Don't align the last SVE callee save.

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• [AArch64][SVE] Fix epilogue for SVE when the stack is realigned.

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• [SVE] Don't use LocalStackAllocation for SVE objects

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• [CodeGen] Remove calls to getVectorNumElements in DAGTypeLegalizer::SplitVecOp_EXTRACT_SUBVECTOR

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• [SVE] Add checks for no warnings in CodeGen/AArch64/sve-sext-zext.ll

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• [SVE][CodeGen] Add simple integer add tests for SVE tuple types

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• [SVE] Don't consider scalable vector types in SLPVectorizerPass::vectorizeChainsInBlock

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• [SVE][CodeGen] At -O0 fallback to DAG ISel when translating alloca with scalable types

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• [llvm][sve] Reg + Imm addressing mode for ld1ro.

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• [NFC][AArch64] Replace some template methods/invocations...

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• [llvm][CodeGen] Addressing modes for SVE ldN.

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• [analyzer] Fix out-of-tree only clang build by not relaying on private header

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Commits on Aug 3, 2020

• Align store conditional address

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• [LAA] Avoid adding pointers to the checks if they are not needed.

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• [CMake] Pass bugreport URL to standalone clang build

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• AMDGPU: Put inexpensive ops first in AMDGPUAnnotateUniformValues::visitLoadInst

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Commits on Aug 5, 2020

• Bump forgotten version nbr in llvm/docs/conf.py

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• [llvm] Add RISCVTargetParser.def to the module map

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• RuntimeDyldELF: report_fatal_error instead of asserting for unimplemented relocations (PR46816)

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• [llvm-rc] Allow string table values split into multiple string literals

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• [PowerPC] fixupIsDeadOrKill start and end in different block fixing

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Commits on Aug 6, 2020

• [AArch64] [Windows] Error out on unsupported symbol locations

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Commits on Aug 7, 2020

• [GlobalISel][InlineAsm] Fix matching input constraint to physreg

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Commits on Aug 17, 2020

• [docs] Add release notes for the 11.x release

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• [AArch64][SVE] Fix CFA calculation in presence of SVE objects.

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• [AArch64][SVE] Add missing unwind info for SVE registers.

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• [AArch64][SVE] Disable tail calls if callee does not preserve SVE regs.

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• [SVE][CodeGen] Fix bug with store of unpacked FP scalable vectors

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• Fix -Wconstant-conversion warning with explicit cast

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• [SVE] Fix bug in SVEIntrinsicOpts::optimizePTest

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• [PowerPC] Make StartMI ignore COPY like instructions.

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  Chen Zheng

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• [InstCombine] Sanitize undef vector constant to 1 in X*(2^C) with X << C (PR47133)

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• [X86] Optimize getImpliedDisabledFeatures & getImpliedEnabledFeatures after D83273

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• [X86] Add test case for PR47000. NFC

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• [X86] Disable copy elision in LowerMemArgument for scalarized vectors when the loc VT is a different size than the original element.

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• [release][docs] Update contributions to LLVM 11 for SVE.

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Commits on Aug 19, 2020

• [globalopt] Change so that emitting fragments doesn't use the type size of DIVariables

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• [RISCV] Indirect branch generation in position independent code

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• [release][docs] Note on lazy binding and SVE.

  

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• [release][docs] Move SVE release notes to AArch64 section.

  

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Commits on Aug 24, 2020

• [PowerPC] Fix a typo for InstAlias of mfsprg

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Commits on Aug 25, 2020

• Reuse OMPIRBuilder struct ident_t handling in Clang

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• [DAGCombine] Remove dead node when it is created by getNegatedExpression

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Commits on Aug 26, 2020

• ReleaseNotes: removal of llgo

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• [release][SVE] Move notes for SVE ACLE to the release notes of clang.

  

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• ReleaseNotes: mention the build preferring python 3

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• [MC][SVE] Fix data operand for instruction alias of st1d.

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Commits on Aug 28, 2020

• [X86] Update release notes.

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• [PowerPC] PPCBoolRetToInt: Don't translate Constant's operands

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• [CodeGen] Properly propagating Calling Convention information when lowering vector arguments

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• [AArch64][SVE] Fix calculation restore point for SVE callee saves.

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• [AArch64][SVE] Add missing debug info for ACLE types.

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• [SSP] Restore setting the visibility of __guard_local to hidden for better code generation.

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• Add a few more release notes for ARM and AArch64.

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• [DAGCombine] Don't delete the node if it has uses immediately

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• [cmake] Don't build with -O3 -fPIC on Solaris/sparcv9

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• [InstSimplify] Protect against more poison in SimplifyWithOpReplaced (PR47322)

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• [PowerPC] Set v1i128 to expand for SETCC to avoid crash

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• ReleaseNotes: Add RISC-V updates

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• Eliminate the sizing template parameter N from CoalescingBitVector

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• [WebAssembly] Fix incorrect assumption of simple value types

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• [PowerPC] Do not legalize vector FDIV without VSX

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• [PowerPC] Fix broken kill flag after MI peephole

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• [MachineCopyPropagation] In isNopCopy, check the destination registers match in addition to the source registers.

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• ReleaseNotes: Add updates in LangRef related with undef/poison

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• Provide anchor for compiler extensions

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• [X86] SSE4_A should only imply SSE3 not SSSE3 in the frontend.

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• [PowerPC] Set setMaxAtomicSizeInBitsSupported appropriately for 32-bit PowerPC in PPCTargetLowering

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• [DebugInfo] Fixing CodeView assert related to lowerBound field of DISubrange.

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• [AMDGPU] Fix for folding v2.16 literals.

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• Reduce code duplication in simplifySelectWithICmpCond (NFC)

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• Add test for PR47322 (NFC)

  

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• Fix incorrect SimplifyWithOpReplaced transform (PR47322)

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• [SelectionDAG] Remove unused FP constant in getNegatedExpression

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• [FastISel] Bail out of selectGetElementPtr for vector GEPs.

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• Revert "Double check that passes correctly set their Modified status"

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• Revert "[SelectionDAG] Remove unused FP constant in getNegatedExpression"

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• [Docs] Add/update release notes for D71913 (LTO WPD changes)

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• Revert "RegAllocFast: Record internal state based on register units"

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• ReleaseNotes: PowerPC changes

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• llvm release notes: drop in-progress warnings; minor cleanups

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• [X86][ELF] Prefer lowering MC_GlobalAddress operands to .Lfoo$local for STV_DEFAULT only

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• [SelectionDAG] Check any use of negation result before removal

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• [llvm] Add contains(KeyType) -> bool methods to SmallPtrSet

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• PR47468: Fix findPHICopyInsertPoint, so that copies aren't incorrectly inserted after an INLINEASM_BR.

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• [CodeGen] Fixing inconsistent ABI mangling of vlaues in SelectionDAGBuilder

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• llvm index.rst: Drop in-progress warning

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• release notes: mention zig as an external project

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• AArch64/GlobalISel: Reduced patch for bug 47619

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• AArch64/GlobalISel: Narrow stack passed argument access size

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• [CodeGen] Do not call emitGlobalConstantLargeInt for constant requires 8 bytes to store

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• C API: functions to get mask of a ShuffleVector

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• [LLVM-C] Turn a ShuffleVector Constant Into a Getter.

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• Fix mysterious failure of SupportTests FileCheckTest.Binop

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• [LLVM 11] Add SystemZ changes to release notes

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• [GlobalISel] Fix multiply with overflow intrinsics legalization generating invalid MIR.

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• [APFloat] prevent NaN morphing into Inf on conversion (PR43907)

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• LLVM release notes: JIT changes

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• Fix indentation for PowerPC ReleaseNotes

  

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• ReleaseNotes: mention the machine outliner for ARM

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• [SelectionDAG] Don't remove unused negated constant immediately

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• [CodeGen][TailDuplicator] Don't duplicate blocks with INLINEASM_BR

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• X86: Fix/workaround Small Code Model for JIT

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• MCJIT: don't finalize modules on symbol lookup (workaround)

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• Disable GDBRegistrationListener

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• DenseMap: add workaround for C++2a builds

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• X86: add RTM to Haswell+ features

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• X86: LowerShift: new algorithm for vector-vector shifts

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• X86: optimize VSELECT for v16i8 with shl + sign bit test

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• X86: expand detectAVGPattern()

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• X86: add pattern for X86ISD::VSRAV

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• X86: add patterns for X86ISD::VSHLV and X86ISD::VSRLV

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• X86: avoid vector-scalar shifts if splat amount is directly a vector ADD/SUB/AND op.

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• Set up CI with Azure Pipelines

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• test: Remove test files

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• Host: Add workaround for Zen3

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• Remove tensorflow support

  

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• Fix possible compilation issue with gcc-11

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• C++20 fixes

  

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• Ninja build

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