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Disable Verific blackbox checks (different from our preferred approach)
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akashlevy committed Jan 21, 2025
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- `bounds`: relies on using Verific's VHDL frontend
- `memory_semantics`: relies on initial values being retained, which we do not want
- `rom_case`: relies on using Verific's VHDL frontend
- `blackbox*`: we need different behavior for parametrized blackboxes
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