Fix Yosys to allow SV again

Silimate · May 9, 2024 · c7f6673 · c7f6673
1 parent 2a79db1
commit c7f6673
Showing 1 changed file with 1 addition and 0 deletions.
diff --git a/frontends/verific/verific.cc b/frontends/verific/verific.cc
@@ -3397,6 +3397,7 @@ struct VerificPass : public Pass {
 			// Treat .v as SystemVerilog too (overriding default behavior to treat it as VERILOG_2000)
 			hdl_file_sort::RemoveFileExt(".v");
 			hdl_file_sort::AddFileExtMode(".v", veri_file::SYSTEM_VERILOG);
+			hdl_file_sort::AddFileExtMode(".sv", veri_file::SYSTEM_VERILOG);
 
 			// Select analyze function
 			auto analyze_function = (args[argidx] == "-auto_discover") ? hdl_file_sort::AnalyzeDiscoveredFiles : hdl_file_sort::AnalyzeSortedFiles;