First pass at PW through MU IO tile

global_buffer/io_placement.py

@@ -85,10 +85,14 @@ def place_io_blk(id_to_name, app_dir, io_sides):
     placement = {}
     # find out all the IO blocks
     ios = []
+    inputs_from_MU = []
     for blk_id in blks:
         if blk_id[0] in {"i", "I"}:
             assert blk_id not in ios
             ios.append(blk_id)
+        elif blk_id[0] in {"u", "U"}:
+            assert blk_id not in inputs_from_MU
+            inputs_from_MU.append(blk_id)
 
     # need to know if it's an input or output
 
@@ -156,6 +160,13 @@ def place_io_blk(id_to_name, app_dir, io_sides):
         #placement[reset] = (0, 0)
         placement[reset] = (1, 0)
 
+
+    # Place MU I/O tiles if needed
+    # TODO: Need to pass on the x column of the MU IO tiles. It's num_fabric_cols_removed - 1
+    mu_io_tile_column = 3
+    for idx, input_blk in enumerate(inputs_from_MU):
+        placement[input_blk] = (mu_io_tile_column, int(idx / 2) + 1)
+
     # manual placement of PE/MEM tiles if needed
     if "MANUAL_PLACER" in os.environ and os.environ.get("MANUAL_PLACER") == "1" and os.path.isfile(app_dir + "/manual.place"):
     # MO: Matrix unit HACK for manual placement

mapper/netlist_util.py

@@ -253,12 +253,17 @@ def visit_Select(self, node):
             if node.type == Bit:
                 id = f"i"
             elif node.type == BitVector[16]:
-                id = f"I"
+                if "MU" in child.iname:
+                    id = f"U"
+                    self.tile_types.add("U")
+                else:
+                    id = f"I"
             else:
                 raise NotImplementedError(f"{node}, {node.type}")
             self.node_to_type[child.iname] = id
             self.tile_types.add("I")
             self.tile_types.add("i")
+
 
     def visit_Combine(self, node):
         Visitor.generic_visit(self, node)
@@ -326,6 +331,11 @@ class IO_Input_t_rv(Product):
     io2f_17_1 = BitVector[16]
     io2f_17_2 = BitVector[16]
     io2f_17_3 = BitVector[16]
+    io2f_17_T0 = BitVector[16]
+    io2f_17_T1 = BitVector[16]
+    io2f_17_T2 = BitVector[16]
+    io2f_17_T3 = BitVector[16]
+    io2f_17_T4 = BitVector[16]
     io2f_1 = Bit
 
 
@@ -863,7 +873,12 @@ def visit_Select(self, node: DagNode):
             io_child = new_children[0]
 
             # -----------------IO-to-MEM/Pond Paths Pipelining-------------------- #
-            if "io16in" in io_child.iname:
+            if "MU" in io_child.iname:
+                # MO: MU IO tile HACK. Temporarily hardcoding to use track T0
+                new_node = new_children[0].select("io2f_17_T0")
+
+
+            elif "io16in" in io_child.iname:
                 if self.ready_valid:
                     if self.include_E64_HW:
                         if self.exchange_64_mode:
@@ -1258,7 +1273,7 @@ def tile_to_char(t):
 
     node_info = {t: tile_to_char(t) for t in tile_info}
     nodes_to_ids = CreateIDs(node_info).doit(pdag)
-
+    
     if load_only:
         names_to_ids = {name: id_ for id_, name in id_to_name.items()}
     else:
@@ -1313,15 +1328,20 @@ def tile_to_char(t):
         if exchange_64_mode and ("I" in id or "i" in id):
             node_config_kwargs['exchange_64_mode'] = 1
 
-        if (dense_ready_valid or exchange_64_mode) and ("I" in id or "i" in id):
+        # MO: MU IO tile HACK for now. Hardcoding it to use track T0
+        if "U" in id or "u" in id:
+            node_config_kwargs['track_active_T0'] = 1
+
+
+        if ((dense_ready_valid or exchange_64_mode) and ("I" in id or "i" in id)) or "U" in id or "u" in id:
             info["id_to_instrs"][id] = (1, node_config_kwargs) 
         else:
             info["id_to_instrs"][id] = nodes_to_instrs[node]
 
     info["instance_to_instrs"] = {
         info["id_to_name"][id]: instr
         for id, instr in info["id_to_instrs"].items()
-        if ("p" in id or "m" in id or "I" in id or "i" in id)
+        if ("p" in id or "m" in id or "I" in id or "i" in id or "U" in id or "u" in id)
     }
     for node, md in node_to_metadata.items():
         info["instance_to_instrs"][node] = md

memory_core/mu2f_io_core_rv.py

@@ -98,23 +98,13 @@ def get_config_bitstream(self, config_tuple):
         else:
             config_kwargs = config_tuple
 
-        if 'sparse_mode' in config_kwargs:
-            configs_pre = []
-        else:
-            configs_pre = [
-            ]
-        dense_bypass = 0
+
         configs = []
-        # add valid high reg sel
 
-       # sub_dict = {'dense_bypass': dense_bypass}
-        tile_config = self.dut.get_bitstream(sub_dict)
-        for name, v in configs_pre:
-            configs = [self.get_config_data(name, v)] + configs
+        tile_config = self.dut.get_bitstream(config_kwargs)
         for name, v in tile_config:
             configs = [self.get_config_data(name, v)] + configs
-        #return configs
-        return []
+        return configs
 
     def pnr_info(self):
         return [PnRTag("U", 2, self.DEFAULT_PRIORITY),