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scripts: load CLKGATE_MAP_FILE as lib and techmap it #2439

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scripts: load CLKGATE_MAP_FILE as lib and techmap it #2439

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5 changes: 5 additions & 0 deletions flow/scripts/synth.tcl
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Original file line number Diff line number Diff line change
Expand Up @@ -35,6 +35,11 @@ if {[env_var_exists_and_non_empty LATCH_MAP_FILE]} {
techmap -map $::env(LATCH_MAP_FILE)
}

# Technology mapping of ICGs
if {[env_var_exists_and_non_empty CLKGATE_MAP_FILE]} {
techmap -map $::env(CLKGATE_MAP_FILE)
}

set dfflibmap_args ""
foreach cell $::env(DONT_USE_CELLS) {
lappend dfflibmap_args -dont_use $cell
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2 changes: 1 addition & 1 deletion flow/scripts/synth_preamble.tcl
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Expand Up @@ -48,7 +48,7 @@ if {[env_var_exists_and_non_empty VERILOG_TOP_PARAMS]} {

# Read platform specific mapfile for OPENROAD_CLKGATE cells
if {[env_var_exists_and_non_empty CLKGATE_MAP_FILE]} {
read_verilog -defer $::env(CLKGATE_MAP_FILE)
read_verilog -lib $::env(CLKGATE_MAP_FILE)
}

# Mark modules to keep from getting removed in flattening
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