feat: update project tt_um_digitaler_filter_rathmayr from NicoRathmay…

…r/jku-tt06-Digitaler-Filter

Commit: c8eb78496df78c3b2e8ebc1f4f752a9e855ee77f
Workflow: https://github.com/NicoRathmayr/jku-tt06-Digitaler-Filter/actions/runs/7986714345

projects/tt_um_digitaler_filter_rathmayr/LICENSE

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projects/tt_um_digitaler_filter_rathmayr/commit_id.json

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+{
+  "app": "Tiny Tapeout tt06 e8c5040d",
+  "repo": "https://github.com/NicoRathmayr/jku-tt06-Digitaler-Filter",
+  "commit": "c8eb78496df78c3b2e8ebc1f4f752a9e855ee77f",
+  "workflow_url": "https://github.com/NicoRathmayr/jku-tt06-Digitaler-Filter/actions/runs/7986714345",
+  "sort_id": 1709300416068,
+  "openlane_version": "OpenLane f691c8c0712ca6c6645e3fd548985b3cbcf08c78",
+  "pdk_version": "open_pdks e0f692f46654d6c7c99fc70a0c94a080dab53571"
+}

projects/tt_um_digitaler_filter_rathmayr/docs/info.md

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+<!---
+
+This file is used to generate your project datasheet. Please fill in the information below and delete any unused
+sections.
+
+You can also include images in this folder and reference them in the markdown. Each image must be less than
+512 kb in size, and the combined size of all images must be less than 1 MB.
+-->
+
+## How it works
+
+Ziel dieses Projekts ist es, einen effizienten digitalen Filter zu entwerfen und zu implementieren, der in der Lage ist, unerwünschte Frequenzen aus einem digitalen Signal zu filtern.
+
+Der FIR-Filter (Finite Impulse Response) zeichnet sich durch seine endliche Impulsantwort aus, die durch eine endliche Anzahl von Koeffizienten definiert wird. In diesem Fall werden lediglich zwei Koeffizienten verwendet, was den Entwurfsprozess vereinfacht und die Implementierung auf einem FPGA (Field-Programmable Gate Array) oder einem anderen digitalen Schaltkreis optimiert.
+
+Die zwei Koeffizienten werden sorgfältig ausgewählt, um die gewünschte Frequenzantwort des Filters zu erreichen. Dabei ist es wichtig, die Anforderungen des Anwendungsfall zu berücksichtigen, sei es für Audioverarbeitung, Bildverarbeitung oder eine andere Anwendung im Bereich der Signalverarbeitung.
+
+Belegung der digitale Inputs und Outputs:
+- ui_in 8 bit Einganssignal 'x'
+- uio_in 8 bit Koeffizienten 'const\_h'
+- uo_out 8 bit Ausgangssignal 'y'
+- uio_out nicht verwendet!
+- uio_oe nicht verwendet!
+
+Ursprünglich war die Programmierung des Filters mit vier Koeffizienten geplant, jedoch musste diese Ambition aufgrund von Kapazitätsbeschränkungen des Chips auf zwei Koeffizienten reduziert werden. Im Code sind entsprechende Ergänzungen für vier Koeffizienten auskommentiert, was die Möglichkeit einer zukünftigen Erweiterung des Programms gewährleistet. Um nun sämtliche Koeffizienten mit nur einem 8-Bit-Eingang einzulesen und in das entsprechende Register zu speichern, wurde eine Art Schieberegister implementiert. Jede neue Flanke des Clock-Signals ermöglicht es, einen neu eingelesenen Wert an der gewünschten Position im Register abzulegen. Sobald die maximale Anzahl an Plätzen im Register belegt ist, wird die Flag auf Low gesetzt und der Zähler zurückgesetzt. Das Eingangssignal wird ebenfalls mittels eines Schieberegisters eingelesen, indem der Wert im Register in jedem Schritt um eine Stelle verschoben wird. Nun zur eigentlichen Filteroperation: Die gewünschten Koeffizienten werden mit dem Eingangssignal multipliziert und nach jedem Schritt summiert. Dabei ist zu berücksichtigen, dass die beiden Register unterschiedliche Größen haben und daher angepasst werden müssen. Das gefilterte Eingangssignal wird als Ausgangssignal aus einem Ausschnitt der in der Summe gespeicherten Bitfolge ausgegeben. Diese Schritte gewährleisten eine präzise Signalverarbeitung und verdeutlichen die Anpassungsfähigkeit des Programms für potenzielle zukünftige Erweiterungen.
+
+## How to test
+
+siehe Testbench.
+
+## External hardware
+
+You do not need any special external hardware.

projects/tt_um_digitaler_filter_rathmayr/info.yaml

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+# Tiny Tapeout project information
+project:
+  title:        "Digitaler Filter"      # Project title
+  author:       "Nico Rathmayr"      # Your name
+  discord:      ""      # Your discord username, for communication and automatically assigning you a Tapeout role (optional)
+  description:  "FIR-Filter using two coefficents to filter 8-bit signal"      # One line description of what your project does
+  language:     "Verilog" # other examples include SystemVerilog, Amaranth, VHDL, etc
+  clock_hz:     0       # Clock frequency in Hz (or 0 if not applicable)
+
+  # How many tiles your design occupies? A single tile is about 167x108 uM.
+  tiles: "1x1"          # Valid values: 1x1, 1x2, 2x2, 3x2, 4x2, 6x2 or 8x2
+
+  # Your top module name must start with "tt_um_". Make it unique by including your github username:
+  top_module:  "tt_um_digitaler_filter_rathmayr"
+
+  # List your project's source files here. Source files must be in ./src and you must list each source file separately, one per line:
+  source_files:        
+    - "tt_um_digitaler_filter_rathmayr.v"
+
+# The pinout of your project. Leave unused pins blank. DO NOT delete or add any pins.
+pinout:
+  # Inputs
+  ui[0]: "input signal bit 0"
+  ui[1]: "input signal bit 1"
+  ui[2]: "input signal bit 2"
+  ui[3]: "input signal bit 3"
+  ui[4]: "input signal bit 4"
+  ui[5]: "input signal bit 5"
+  ui[6]: "input signal bit 6"
+  ui[7]: "input signal bit 7"
+
+  # Outputs
+  uo[0]: "output signal bit 0"
+  uo[1]: "output signal bit 1"
+  uo[2]: "output signal bit 2"
+  uo[3]: "output signal bit 3"
+  uo[4]: "output signal bit 4"
+  uo[5]: "output signal bit 5"
+  uo[6]: "output signal bit 6"
+  uo[7]: "output signal bit 7"
+
+  # Bidirectional pins
+  uio[0]: "input coefficient bit 0"
+  uio[1]: "input coefficient bit 1"
+  uio[2]: "input coefficient bit 2"
+  uio[3]: "input coefficient bit 3"
+  uio[4]: "input coefficient bit 4"
+  uio[5]: "input coefficient bit 5"
+  uio[6]: "input coefficient bit 6"
+  uio[7]: "input coefficient bit 7"
+
+# Do not change!
+yaml_version: 6

projects/tt_um_digitaler_filter_rathmayr/stats/metrics.csv

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+design,design_name,config,flow_status,total_runtime,routed_runtime,(Cell/mm^2)/Core_Util,DIEAREA_mm^2,CellPer_mm^2,OpenDP_Util,Final_Util,Peak_Memory_Usage_MB,synth_cell_count,tritonRoute_violations,Short_violations,MetSpc_violations,OffGrid_violations,MinHole_violations,Other_violations,Magic_violations,pin_antenna_violations,net_antenna_violations,lvs_total_errors,cvc_total_errors,klayout_violations,wire_length,vias,wns,pl_wns,optimized_wns,fastroute_wns,spef_wns,tns,pl_tns,optimized_tns,fastroute_tns,spef_tns,HPWL,routing_layer1_pct,routing_layer2_pct,routing_layer3_pct,routing_layer4_pct,routing_layer5_pct,routing_layer6_pct,wires_count,wire_bits,public_wires_count,public_wire_bits,memories_count,memory_bits,processes_count,cells_pre_abc,AND,DFF,NAND,NOR,OR,XOR,XNOR,MUX,inputs,outputs,level,DecapCells,WelltapCells,DiodeCells,FillCells,NonPhysCells,TotalCells,CoreArea_um^2,power_slowest_internal_uW,power_slowest_switching_uW,power_slowest_leakage_uW,power_typical_internal_uW,power_typical_switching_uW,power_typical_leakage_uW,power_fastest_internal_uW,power_fastest_switching_uW,power_fastest_leakage_uW,critical_path_ns,suggested_clock_period,suggested_clock_frequency,CLOCK_PERIOD,FP_ASPECT_RATIO,FP_CORE_UTIL,FP_PDN_HPITCH,FP_PDN_VPITCH,GRT_ADJUSTMENT,GRT_REPAIR_ANTENNAS,MAX_FANOUT_CONSTRAINT,PL_TARGET_DENSITY,RUN_HEURISTIC_DIODE_INSERTION,STD_CELL_LIBRARY,SYNTH_STRATEGY
+/work/src,tt_um_digitaler_filter_rathmayr,wokwi,flow completed,0h2m57s0ms,0h2m32s0ms,114176.10522469858,0.01795472,57088.05261234929,62.04,78.9637,567.05,987,0,0,0,0,0,0,0,0,0,0,-1,-1,19760,6797,0.0,-1,-1,-1,-1,0.0,-1,-1,-1,-1,14525152.0,0.0,41.87,29.23,8.31,3.8,-1,880,1139,21,144,0,0,0,958,130,48,52,55,90,199,93,18,76,126,19,735,225,1,416,1025,2402,16493.3184,-1,-1,-1,-1,-1,-1,-1,-1,-1,-1,21.0,47.61904761904762,20,1,50,26.520,38.870,0.3,1,10,0.8,0,sky130_fd_sc_hd,AREA 0