feat: update project tt_um_dlmiles_bad_synchronizer from dlmiles/ttih…

…p0p2-bad-synchronizer

Commit: 5ab874a3252605f163e7179e4e0815d558c73c59
Workflow: https://github.com/dlmiles/ttihp0p2-bad-synchronizer/actions/runs/11654762745

projects/tt_um_dlmiles_bad_synchronizer/commit_id.json

@@ -1,7 +1,7 @@
 {
   "app": "Tiny Tapeout tt09 b176ed7c",
   "repo": "https://github.com/dlmiles/ttihp0p2-bad-synchronizer",
-  "commit": "4517fd9d30a554256ed989a4c63c5174fccc4df6",
-  "workflow_url": "https://github.com/dlmiles/ttihp0p2-bad-synchronizer/actions/runs/11647596634",
+  "commit": "5ab874a3252605f163e7179e4e0815d558c73c59",
+  "workflow_url": "https://github.com/dlmiles/ttihp0p2-bad-synchronizer/actions/runs/11654762745",
   "sort_id": 1730600055713
 }

projects/tt_um_dlmiles_bad_synchronizer/stats/metrics.csv

@@ -1,215 +1,219 @@
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 finish__flow__warnings__count,9
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 detailedroute__route__net__special,2
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 detailedroute__route__drc_errors,0
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@@ -226,20 +230,20 @@ run__flow__platform__power_units,1pW
 run__flow__platform__distance_units,1um
 floorplan__timing__setup__tns,0
 floorplan__timing__setup__ws,15.7587
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-floorplan__power__total,1.36573e-05
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 floorplan__design__io,43
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 floorplan__flow__warnings__count,46
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projects/tt_um_dlmiles_bad_synchronizer/stats/synthesis-stats.txt

@@ -3,8 +3,8 @@
 
 === tt_um_dlmiles_bad_synchronizer ===
 
-   Number of wires:                 25
-   Number of wire bits:             60
+   Number of wires:                 29
+   Number of wire bits:             64
    Number of public wires:           9
    Number of public wire bits:      44
    Number of ports:                  8
@@ -13,15 +13,15 @@
    Number of memory bits:            0
    Number of processes:              0
    Number of cells:                 32
-     sg13g2_buf_1                   16
-     sg13g2_dfrbp_1                  9
+     sg13g2_buf_1                   12
+     sg13g2_dfrbp_1                 13
      sg13g2_nand2_1                  1
      sg13g2_nand3_1                  1
      sg13g2_tiehi                    1
      sg13g2_tielo                    1
      sg13g2_xnor2_1                  2
      sg13g2_xor2_1                   1
 
-   Chip area for module '\tt_um_dlmiles_bad_synchronizer': 615.081600
-     of which used for sequential elements: 424.569600 (69.03%)
+   Chip area for module '\tt_um_dlmiles_bad_synchronizer': 774.748800
+     of which used for sequential elements: 613.267200 (79.16%)