Chisel instead of Verilog

TinyTapeout · Nov 5, 2024 · 10e2d65 · 10e2d65
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diff --git a/README.md b/README.md
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 ![](../../workflows/gds/badge.svg) ![](../../workflows/docs/badge.svg) ![](../../workflows/test/badge.svg)
 
-# Tiny Tapeout Verilog Project Template
+# Tiny Tapeout Chisel Project Template
 
 - [Read the documentation for project](docs/info.md)