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[AIE2p] Update FIFO ld/st builtins to maintain bank annotations
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This disables type checking for clang builtin parameters, and allows us
to do the right casts to maintain addrspace information.

This seems barbaric, but type checking is still done for the frontend/C++
intrinsics of clang/lib/Headers/aie2p_ldst.h, and for the LLVM IR
instrinsics of the IR layer.

I could not find a better way to pass "non-default" pointers to clang
builtins, and it seems other targets adop the same strategy.
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@gbossu
gbossu committed Feb 4, 2025
1 parent d2ded04 commit a116730
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50 changes: 26 additions & 24 deletions clang/include/clang/Basic/BuiltinsAIE2P.def
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Original file line number Diff line number Diff line change
Expand Up @@ -323,29 +323,31 @@ BUILTIN(__builtin_aie2p_divstep, "vUi&Ui&Ui", "nc")

// SHUFFLE
BUILTIN(__builtin_aie2p_vshuffle_576_bfp16, "vV64cV8cV64cV8ciV64c&V8c&", "nc")

// Unaligned and bfp16 stores
BUILTIN(__builtin_aie2p_fifo_st_push_576_bfp16, "vi*&V64cV8cV32i&i&", "nc")
BUILTIN(__builtin_aie2p_fifo_st_push_512_bfp16, "vi*&V16iV32i&i&", "nc")
BUILTIN(__builtin_aie2p_fifo_st_push_544_bfp16, "vi*&V64cV8cV32i&i&", "nc")
BUILTIN(__builtin_aie2p_fifo_st_flush, "vi*&V32i&i&", "nc")
BUILTIN(__builtin_aie2p_fifo_st_flush_1d_byte, "vi*&V32i&i&i", "nc")
BUILTIN(__builtin_aie2p_fifo_st_flush_2d_byte, "vi*&V32i&i&iii&i", "nc")
BUILTIN(__builtin_aie2p_fifo_st_flush_3d_byte, "vi*&V32i&i&iii&iii&i", "nc")
BUILTIN(__builtin_aie2p_fifo_st_flush_conv, "vi*&V32i&i&", "nc")
BUILTIN(__builtin_aie2p_fifo_st_flush_conv_1d_byte, "vi*&V32i&i&i", "nc")
BUILTIN(__builtin_aie2p_fifo_st_flush_conv_2d_byte, "vi*&V32i&i&iii&i", "nc")
BUILTIN(__builtin_aie2p_fifo_st_flush_conv_3d_byte, "vi*&V32i&i&iii&iii&i", "nc")
BUILTIN(__builtin_aie2p_fifo_st_push_576_bfp16, "vv*&V64cV8cV32i&i&", "t")
BUILTIN(__builtin_aie2p_fifo_st_push_512_bfp16, "vv*&V16iV32i&i&", "t")
BUILTIN(__builtin_aie2p_fifo_st_push_544_bfp16, "vv*&V64cV8cV32i&i&", "t")
BUILTIN(__builtin_aie2p_fifo_st_flush, "vv*&V32i&i&", "t")
BUILTIN(__builtin_aie2p_fifo_st_flush_1d_byte, "vv*&V32i&i&i", "t")
BUILTIN(__builtin_aie2p_fifo_st_flush_2d_byte, "vv*&V32i&i&iii&i", "t")
BUILTIN(__builtin_aie2p_fifo_st_flush_3d_byte, "vv*&V32i&i&iii&iii&i", "t")
BUILTIN(__builtin_aie2p_fifo_st_flush_conv, "vv*&V32i&i&", "t")
BUILTIN(__builtin_aie2p_fifo_st_flush_conv_1d_byte, "vv*&V32i&i&i", "t")
BUILTIN(__builtin_aie2p_fifo_st_flush_conv_2d_byte, "vv*&V32i&i&iii&i", "t")
BUILTIN(__builtin_aie2p_fifo_st_flush_conv_3d_byte, "vv*&V32i&i&iii&iii&i", "t")

// Unaligned and bfp16 loads
BUILTIN(__builtin_aie2p_fifo_ld_fill, "vi*&V32i&i&", "nc")
BUILTIN(__builtin_aie2p_fifo_ld_pop_512_unaligned, "V64ci*&V32i&i&", "nc")
BUILTIN(__builtin_aie2p_fifo_ld_pop_544_bfp16, "vi*&V32i&i&V64c&V8c&", "nc")
BUILTIN(__builtin_aie2p_fifo_ld_pop_576_bfp16, "vi*&V32i&i&V64c&V8c&", "nc")
BUILTIN(__builtin_aie2p_fifo_ld_pop_1d_512_unaligned, "V64ci*&V32i&i&i", "nc")
BUILTIN(__builtin_aie2p_fifo_ld_pop_1d_544_bfp16, "vi*&V32i&i&iV64c&V8c&", "nc")
BUILTIN(__builtin_aie2p_fifo_ld_pop_1d_576_bfp16, "vi*&V32i&i&iV64c&V8c&", "nc")
BUILTIN(__builtin_aie2p_fifo_ld_pop_2d_512_unaligned, "V64ci*&V32i&i&iii&i", "nc")
BUILTIN(__builtin_aie2p_fifo_ld_pop_2d_544_bfp16, "vi*&V32i&i&iii&iV64c&V8c&", "nc")
BUILTIN(__builtin_aie2p_fifo_ld_pop_2d_576_bfp16, "vi*&V32i&i&iii&iV64c&V8c&", "nc")
BUILTIN(__builtin_aie2p_fifo_ld_pop_3d_512_unaligned, "V64ci*&V32i&i&iii&iii&i", "nc")
BUILTIN(__builtin_aie2p_fifo_ld_pop_3d_544_bfp16, "vi*&V32i&i&iii&iii&iV64c&V8c&", "nc")
BUILTIN(__builtin_aie2p_fifo_ld_pop_3d_576_bfp16, "vi*&V32i&i&iii&iii&iV64c&V8c&", "nc")
BUILTIN(__builtin_aie2p_fifo_ld_fill, "vv*&V32i&i&", "t")
BUILTIN(__builtin_aie2p_fifo_ld_pop_512_unaligned, "V64cv*&V32i&i&", "t")
BUILTIN(__builtin_aie2p_fifo_ld_pop_544_bfp16, "vv*&V32i&i&V64c&V8c&", "t")
BUILTIN(__builtin_aie2p_fifo_ld_pop_576_bfp16, "vv*&V32i&i&V64c&V8c&", "t")
BUILTIN(__builtin_aie2p_fifo_ld_pop_1d_512_unaligned, "V64cv*&V32i&i&i", "t")
BUILTIN(__builtin_aie2p_fifo_ld_pop_1d_544_bfp16, "vv*&V32i&i&iV64c&V8c&", "t")
BUILTIN(__builtin_aie2p_fifo_ld_pop_1d_576_bfp16, "vv*&V32i&i&iV64c&V8c&", "t")
BUILTIN(__builtin_aie2p_fifo_ld_pop_2d_512_unaligned, "V64cv*&V32i&i&iii&i", "t")
BUILTIN(__builtin_aie2p_fifo_ld_pop_2d_544_bfp16, "vv*&V32i&i&iii&iV64c&V8c&", "t")
BUILTIN(__builtin_aie2p_fifo_ld_pop_2d_576_bfp16, "vv*&V32i&i&iii&iV64c&V8c&", "t")
BUILTIN(__builtin_aie2p_fifo_ld_pop_3d_512_unaligned, "V64cv*&V32i&i&iii&iii&i", "t")
BUILTIN(__builtin_aie2p_fifo_ld_pop_3d_544_bfp16, "vv*&V32i&i&iii&iii&iV64c&V8c&", "t")
BUILTIN(__builtin_aie2p_fifo_ld_pop_3d_576_bfp16, "vv*&V32i&i&iii&iii&iV64c&V8c&", "t")
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