Fix bug again (#1747)

Xilinx · Sep 5, 2024 · 033486f · 033486f
1 parent a76c494
commit 033486f
Showing 1 changed file with 1 addition and 1 deletion.
diff --git a/python/compiler/txn2mlir.py b/python/compiler/txn2mlir.py
@@ -65,7 +65,7 @@ def parse_txn(data, verbose=False):
                 _, addr, size = struct.unpack("III", data[i + 4 : i + 16])
                 print_log(f"addr: {addr:#x}")
                 print_log(f"size: {size}")
-                operations.append((opc, addr, data[i + 16 : i + size - 16]))
+                operations.append((opc, addr, data[i + 16 : i + size]))
                 i = i + size
             elif opc == 0x03:
                 print_log("opcode: MASKWRITE (0x03)")