[xllvm] Create dialect for external LLVM IR intrinsics (#1085)

include/aie/Conversion/AIEVecToLLVM/AIEVecToLLVM.h

@@ -18,7 +18,7 @@
 namespace mlir {
 class LLVMTypeConverter;
 class RewritePatternSet;
-class Pass;
+class ModuleOp;
 } // namespace mlir
 
 namespace xilinx {

include/aie/Conversion/Passes.td

@@ -24,7 +24,8 @@ def ConvertAIEVecToLLVM : Pass<"convert-aievec-to-llvm", "mlir::ModuleOp"> {
   let constructor = "xilinx::aievec::createConvertAIEVecToLLVMPass()";
   let dependentDialects = ["LLVM::LLVMDialect",
                            "mlir::arith::ArithDialect",
-                           "mlir::vector::VectorDialect"];
+                           "mlir::vector::VectorDialect",
+                           "xilinx::xllvm::XLLVMDialect"];
 }
 
 #endif // AIE_CONVERSION_PASSES

include/aie/Dialect/AIEVec/IR/AIEVecOps.td

@@ -14,7 +14,6 @@
 #define AIEVEC_OPS
 
 include "aie/Dialect/AIE/IR/AIEAttrs.td"
-include "aie/Dialect/AIEVec/IR/AIEVecLLVMIntrOp.td"
 include "aie/Dialect/AIEVec/IR/AIEVecTypes.td"
 include "aie/Dialect/AIEVec/IR/AIEVecTypeConstraints.td"
 

include/aie/Dialect/AIEVec/Utils/Utils.h

@@ -16,25 +16,13 @@
 #include <optional>
 #include <type_traits>
 
-namespace llvm {
-
-class CallInst;
-class IRBuilderBase;
-class StringRef;
-
-} // namespace llvm
-
 namespace mlir {
 
 class AffineExpr;
 class AffineForOp;
 class AffineMap;
 class Operation;
 
-namespace LLVM {
-class ModuleTranslation;
-} // namespace LLVM
-
 } // namespace mlir
 
 namespace xilinx::aievec {
@@ -49,12 +37,6 @@ std::optional<int64_t> getTransferReadAlignmentOffset(TransferReadLikeOp readOp,
                                                       mlir::VectorType vType,
                                                       int64_t alignment);
 
-llvm::CallInst *
-createExternalIntrinsicCall(llvm::IRBuilderBase &builder,
-                            mlir::LLVM::ModuleTranslation &moduleTranslation,
-                            mlir::Operation *intrOp,
-                            llvm::StringRef intrinsicName);
-
 } // namespace xilinx::aievec
 
 #endif // AIE_DIALECT_AIEVEC_UTILS_UTILS_H

include/aie/Dialect/CMakeLists.txt

@@ -4,8 +4,10 @@
 # SPDX-License-Identifier: Apache-2.0 WITH LLVM-exception
 #
 # (c) Copyright 2021 Xilinx Inc.
+# (c) Copyright 2024 Advanced Micro Devices, Inc.
 
 add_subdirectory(ADF)
 add_subdirectory(AIE)
 add_subdirectory(AIEX)
 add_subdirectory(AIEVec)
+add_subdirectory(XLLVM)

include/aie/Dialect/XLLVM/CMakeLists.txt

@@ -0,0 +1,8 @@
+#
+# This file is licensed under the Apache License v2.0 with LLVM Exceptions.
+# See https://llvm.org/LICENSE.txt for license information.
+# SPDX-License-Identifier: Apache-2.0 WITH LLVM-exception
+#
+# (c) Copyright 2024 Advanced Micro Devices, Inc.
+
+add_subdirectory(IR)

include/aie/Dialect/XLLVM/IR/CMakeLists.txt

@@ -0,0 +1,17 @@
+#
+# This file is licensed under the Apache License v2.0 with LLVM Exceptions.
+# See https://llvm.org/LICENSE.txt for license information.
+# SPDX-License-Identifier: Apache-2.0 WITH LLVM-exception
+#
+# (c) Copyright 2024 Advanced Micro Devices, Inc.
+
+add_mlir_dialect(XLLVM xllvm)
+add_mlir_doc(XLLVMOps XLLVMOps ./ -gen-dialect-doc -dialect=xllvm)
+
+# Add XLLVM operations
+set(LLVM_TARGET_DEFINITIONS XLLVMOps.td)
+mlir_tablegen(XLLVMOps.h.inc -gen-op-decls)
+mlir_tablegen(XLLVMOps.cpp.inc -gen-op-defs)
+add_public_tablegen_target(MLIRXLLVMOpsIncGen)
+mlir_tablegen(XLLVMConversions.inc -gen-llvmir-conversions)
+add_public_tablegen_target(MLIRXLLVMConversionsIncGen)

include/aie/Dialect/XLLVM/IR/XLLVM.td

@@ -0,0 +1,42 @@
+//===- XLLVM.td - XLLVM Dialect definition ----------------*- tablegen -*-====//
+//
+// This file is licensed under the Apache License v2.0 with LLVM Exceptions.
+// See https://llvm.org/LICENSE.txt for license information.
+// SPDX-License-Identifier: Apache-2.0 WITH LLVM-exception
+//
+// (c) Copyright 2024 Advanced Micro Devices, Inc.
+//
+//===----------------------------------------------------------------------===//
+// Defines External LLVM (XLLVM) dialect.
+//===----------------------------------------------------------------------===//
+
+#ifndef AIE_DIALECT_XLLVM_IR_XLLVM_TD
+#define AIE_DIALECT_XLLVM_IR_XLLVM_TD
+
+include "mlir/IR/OpBase.td"
+include "mlir/Dialect/LLVMIR/LLVMOpBase.td"
+
+def XLLVM_Dialect : Dialect {
+  let name = "xllvm";
+  let summary = "Types and operations for external LLVM dialect";
+  let cppNamespace = "::xilinx::xllvm";
+}
+
+// Base clase for external LLVM intrinsic operations
+class ExtIntrOpBase<string opName,
+                    string enumName,
+                    list<Trait> traits,
+                    int numResults
+> : LLVM_OpBase<XLLVM_Dialect, opName, traits>,
+    Results<!if(!gt(numResults, 0), (outs LLVM_Type:$res), (outs))> {
+    string llvmBuilder = [{
+      auto *inst = ::xilinx::xllvm::createExternalLLVMIntrinsicCall(builder,
+                        moduleTranslation, &opInst, "llvm.}] # enumName # [{");
+      (void) inst;
+      $res = inst;
+    }];
+    string mlirBuilder = "";
+    list<int> llvmArgIndices = [];
+}
+
+#endif // AIE_DIALECT_XLLVM_IR_XLLVMDIALECT_TD

include/aie/Dialect/AIEVec/IR/AIEVecLLVMIntrOp.td → include/aie/Dialect/XLLVM/IR/XLLVMAIE2IntrOps.td

@@ -1,46 +1,32 @@
-#ifndef AIE_DIALECT_AIEVEC_IR_AIEVECLLVMINTROP_TD
-#define AIE_DIALECT_AIEVEC_IR_AIEVECLLVMINTROP_TD
+//===- XLLVMAIE2IntrOps.td - XLLVM AIE2 intr. op defs. ----*- tablegen -*-====//
+//
+// This file is licensed under the Apache License v2.0 with LLVM Exceptions.
+// See https://llvm.org/LICENSE.txt for license information.
+// SPDX-License-Identifier: Apache-2.0 WITH LLVM-exception
+//
+// (c) Copyright 2024 Advanced Micro Devices, Inc.
+//
+//===----------------------------------------------------------------------===//
+// Defines external LLVM (XLLVM) intrinsic operations for AIE2 devices.
+//===----------------------------------------------------------------------===//
 
-include "aie/Dialect/AIE/IR/AIEAttrs.td"
-include "aie/Dialect/AIEVec/IR/AIEVecTypes.td"
-include "aie/Dialect/AIEVec/IR/AIEVecTypeConstraints.td"
 
+#ifndef AIE_DIALECT_XLLVM_IR_XLLVMAIE2INTROPS_TD
+#define AIE_DIALECT_XLLVM_IR_XLLVMAIE2INTROPS_TD
+
+include "aie/Dialect/XLLVM/IR/XLLVM.td"
 include "mlir/Interfaces/InferTypeOpInterface.td"
 include "mlir/Interfaces/SideEffectInterfaces.td"
-include "mlir/Dialect/LLVMIR/LLVMOpBase.td"
-
-class ExtIntrOpBase<Dialect dialect,
-                    string opName,
-                    string enumName,
-                    list<Trait> traits,
-                    int numResults
-> : LLVM_OpBase<dialect, opName, traits>,
-    Results<!if(!gt(numResults, 0), (outs LLVM_Type:$res), (outs))> {
-    string llvmBuilder = [{
-      auto *inst = ::xilinx::aievec::createExternalIntrinsicCall(builder, moduleTranslation, &opInst, "llvm.}] #
-      enumName # [{");
-      (void) inst;
-      $res = inst;
-    }];
-    string mlirBuilder = "";
-    list<int> llvmArgIndices = [];
-}
-
-// TODO: Create an aievecllvm dialect so it can be marked legal all at once.
-// TODO: That will require moving AIEVecLLVMIntrOp.td _out_ of AIEVecOps.td
-// TODO: header, which is how these are being generated.
 
 // For AIE2 only
 class AIEVec2_IntrOp<string mnemonic,
                      list<Trait> traits = [],
                      int numResults = 1> :
-    ExtIntrOpBase<AIEVec_Dialect,
-                  /*opName =*/"intr." # mnemonic,
+    ExtIntrOpBase</*opName =*/"intr.aie2." # mnemonic,
                   /*enumName =*/"aie2." # mnemonic,
                   traits,
                   numResults>;
 
-
 // TODO: Find better names for these
 def MacConfAcc32IntrOp :
     AIEVec2_IntrOp<"I512.I512.ACC1024.acc32.mac.conf",
@@ -77,4 +63,4 @@ def VectorSetI512I256IntrOp :
     Arguments<(ins VectorOfLengthAndType<[8], [I32]>:$src,
                    I32:$pos)>;
 
-#endif // AIE_DIALECT_AIEVEC_IR_AIEVECLLVMINTROP_TD
+#endif // AIE_DIALECT_XLLVM_IR_XLLVMAIE2INTROPS_TD

include/aie/Dialect/XLLVM/IR/XLLVMOps.td

@@ -0,0 +1,21 @@
+//===- XLLVMOps.td - XLLVM dialect op definitions ---------*- tablegen -*-====//
+//
+// This file is licensed under the Apache License v2.0 with LLVM Exceptions.
+// See https://llvm.org/LICENSE.txt for license information.
+// SPDX-License-Identifier: Apache-2.0 WITH LLVM-exception
+//
+// (c) Copyright 2024 Advanced Micro Devices, Inc.
+//
+//===----------------------------------------------------------------------===//
+// Defines external LLVM (XLLVM) dialect operations.
+//===----------------------------------------------------------------------===//
+
+#ifndef AIE_DIALECT_XLLVM_IR_XLLVMOPS_TD
+#define AIE_DIALECT_XLLVM_IR_XLLVMOPS_TD
+
+include "aie/Dialect/XLLVM/IR/XLLVM.td"
+
+// Include AIE2 intrinsics.
+include "aie/Dialect/XLLVM/IR/XLLVMAIE2IntrOps.td"
+
+#endif

include/aie/Dialect/XLLVM/XLLVMDialect.h

@@ -0,0 +1,72 @@
+//===- XLLVMDialect.h - External LLVM (xllvm) dialect --------------C++ -*-===//
+//
+// Part of the LLVM Project, under the Apache License v2.0 with LLVM Exceptions.
+// See https://llvm.org/LICENSE.txt for license information.
+// SPDX-License-Identifier: Apache-2.0 WITH LLVM-exception
+//
+//===----------------------------------------------------------------------===//
+//
+// This file defines the XLLVM dialect, containing LLVM intrinsic operations
+// for an external LLVM compiler.
+//
+//===----------------------------------------------------------------------===//
+
+#ifndef AIE_DIALECT_XLLVM_XLLVMDIALECT_H
+#define AIE_DIALECT_XLLVM_XLLVMDIALECT_H
+
+#include "mlir/Bytecode/BytecodeOpInterface.h"
+#include "mlir/Dialect/LLVMIR/LLVMAttrs.h"
+#include "mlir/Dialect/LLVMIR/LLVMInterfaces.h"
+#include "mlir/Dialect/LLVMIR/LLVMTypes.h"
+#include "mlir/IR/BuiltinOps.h"
+#include "mlir/IR/Dialect.h"
+#include "mlir/IR/OpDefinition.h"
+#include "mlir/IR/OpImplementation.h"
+#include "mlir/IR/TypeSupport.h"
+#include "mlir/IR/Types.h"
+#include "mlir/Interfaces/CallInterfaces.h"
+#include "mlir/Interfaces/ControlFlowInterfaces.h"
+#include "mlir/Interfaces/FunctionInterfaces.h"
+#include "mlir/Interfaces/InferTypeOpInterface.h"
+#include "mlir/Interfaces/SideEffectInterfaces.h"
+#include "mlir/Support/ThreadLocalCache.h"
+#include "mlir/Transforms/Mem2Reg.h"
+#include "llvm/ADT/PointerEmbeddedInt.h"
+#include "llvm/IR/DerivedTypes.h"
+#include "llvm/IR/LLVMContext.h"
+#include "llvm/IR/Module.h"
+#include "llvm/IR/Type.h"
+
+#define GET_OP_CLASSES
+#include "aie/Dialect/XLLVM/IR/XLLVMOps.h.inc"
+
+#include "aie/Dialect/XLLVM/IR/XLLVMDialect.h.inc"
+
+namespace llvm {
+
+class CallInst;
+class IRBuilderBase;
+class StringRef;
+
+} // namespace llvm
+
+namespace mlir {
+
+class Operation;
+
+namespace LLVM {
+class ModuleTranslation;
+} // namespace LLVM
+
+} // namespace mlir
+
+namespace xilinx::xllvm {
+
+llvm::CallInst *createExternalLLVMIntrinsicCall(
+    llvm::IRBuilderBase &builder,
+    mlir::LLVM::ModuleTranslation &moduleTranslation, mlir::Operation *intrOp,
+    llvm::StringRef intrinsicName);
+
+} // namespace xilinx::xllvm
+
+#endif // AIE_DIALECT_XLLVM_XLLVMDIALECT_H

include/aie/InitialAllDialect.h

@@ -18,6 +18,7 @@
 #include "aie/Dialect/AIE/IR/AIEDialect.h"
 #include "aie/Dialect/AIEVec/IR/AIEVecDialect.h"
 #include "aie/Dialect/AIEX/IR/AIEXDialect.h"
+#include "aie/Dialect/XLLVM/XLLVMDialect.h"
 
 #include "mlir/IR/Dialect.h"
 
@@ -28,9 +29,10 @@ inline void registerAllDialects(mlir::DialectRegistry &registry) {
   // clang-format off
   registry.insert<
     ADF::ADFDialect,
-    aievec::AIEVecDialect,
     AIE::AIEDialect,
-    AIEX::AIEXDialect
+    aievec::AIEVecDialect,
+    AIEX::AIEXDialect,
+    xllvm::XLLVMDialect
   >();
   // clang-format on
 }

include/aie/Target/LLVMIR/Dialect/All.h

@@ -16,7 +16,7 @@
 #ifndef AIE_TARGET_LLVMIR_DIALECT_ALL_H
 #define AIE_TARGET_LLVMIR_DIALECT_ALL_H
 
-#include "aie/Target/LLVMIR/Dialect/AIEVec/AIEVecToLLVMIRTranslation.h"
+#include "aie/Target/LLVMIR/Dialect/XLLVM/XLLVMToLLVMIRTranslation.h"
 
 namespace mlir {
 class DialectRegistry;
@@ -25,7 +25,7 @@ class DialectRegistry;
 namespace xilinx {
 static inline void
 registerAllAIEToLLVMIRTranslations(mlir::DialectRegistry &registry) {
-  aievec::registerAIEVecDialectTranslation(registry);
+  xllvm::registerXLLVMDialectTranslation(registry);
 }
 } // namespace xilinx
 

include/aie/Target/LLVMIR/Dialect/AIEVec/AIEVecToLLVMIRTranslation.h → include/aie/Target/LLVMIR/Dialect/XLLVM/XLLVMToLLVMIRTranslation.h

@@ -1,4 +1,4 @@
-//===- AIEVecToLLVMIRTranslation.h - AIEVec to LLVM dialect -----*- C++ -*-===//
+//===- XLLVMToLLVMIRTranslation.h - XLLVM to LLVM IR translate -*- C++ -*-===//
 //
 // This file is licensed under the Apache License v2.0 with LLVM Exceptions.
 // See https://llvm.org/LICENSE.txt for license information.
@@ -8,29 +8,29 @@
 //
 //===----------------------------------------------------------------------===//
 //
-// This provides registration calls for AIEVec dialect to LLVM dialect
+// This provides registration calls for XLLVM intrinsics to LLVM IR
 // translation.
 //
 //===----------------------------------------------------------------------===//
 
-#ifndef AIE_TARGET_LLVMIR_DIALECT_AIEVEC_H
-#define AIE_TARGET_LLVMIR_DIALECT_AIEVEC_H
+#ifndef AIE_TARGET_LLVMIR_DIALECT_XLLVM_H
+#define AIE_TARGET_LLVMIR_DIALECT_XLLVM_H
 
 namespace mlir {
 class DialectRegistry;
 class MLIRContext;
 } // namespace mlir
 
-namespace xilinx::aievec {
+namespace xilinx::xllvm {
 
 /// Register the AIEVec dialect and the translation from it to the LLVM dialect
 /// in the given registry.
-void registerAIEVecDialectTranslation(mlir::DialectRegistry &registry);
+void registerXLLVMDialectTranslation(mlir::DialectRegistry &registry);
 
 /// Register the AIEVec dialect and the translation from it to the LLVM dialect
 /// in the registry associated with the given context.
-void registerAIEVecDialectTranslation(mlir::MLIRContext &context);
+void registerXLLVMDialectTranslation(mlir::MLIRContext &context);
 
-} // namespace xilinx::aievec
+} // namespace xilinx::xllvm
 
 #endif // AIE_TARGET_LLVMIR_DIALECT_AIEVEC_H