This project provides a set of utilities for parsing and viewing schematics generated by the Xilinx ISE Tool used for FPGA code development. The schematic file is an XML file and the parser parses it and converts it to a Java object model. The resulting object model can be serialized into JSON representation, or viewed in the graphical form.
The current plan is to use the Processing IDE to interactively view the schematic and it is a work in progress. Once that is complete, the next step would be to create an interactive browser-based viewer that uses HTML5 canvas element.
This is a free and open-source software being developed and released under GPLv3 license. It is provided on an AS-IS basis and no warranties are made to the usefulness, correctness or completeness of this software. To view a copy of this license, visit http://www.gnu.org/copyleft/gpl.html
The project documentation is licensed under the Creative Commons Attribution-NonCommercial 4.0 International License (CC BY-NC). To view a copy of this license, visit http://creativecommons.org/licenses/by-nc/4.0/.
The copyright to this project are owned by Aakash Sahai, NDroit Systems LLC and other contributors, a list of which can be found in the repository.
Xilinx is a trademark/registered-mark of Xilinx Inc (Xilinx). The development of this project is in no way associated or funded by Xilinx, nor is it authorized by Xilinx. Reference to Xilinx in any software or documentation associated with this project shall not be construed as an endorsement by Xilinx Inc.