Linux VP: Code merge + Single Core Variants

vp/src/core/rv64/mem.h

@@ -40,13 +40,15 @@ struct CombinedMemoryInterface : public sc_core::sc_module,
 	sc_core::sc_time dmi_access_delay = clock_cycle * 4;
 	std::vector<MemoryDMI> dmi_ranges;
 
-	MMU &mmu;
+	MMU *mmu;
 
-	CombinedMemoryInterface(sc_core::sc_module_name, ISS &owner, MMU &mmu)
+	CombinedMemoryInterface(sc_core::sc_module_name, ISS &owner, MMU *mmu = nullptr)
 	    : iss(owner), quantum_keeper(iss.quantum_keeper), mmu(mmu) {}
 
 	uint64_t v2p(uint64_t vaddr, MemoryAccessType type) override {
-		return mmu.translate_virtual_to_physical_addr(vaddr, type);
+		if (mmu == nullptr)
+			return vaddr;
+		return mmu->translate_virtual_to_physical_addr(vaddr, type);
 	}
 
 	inline void _do_transaction(tlm::tlm_command cmd, uint64_t addr, uint8_t *data, unsigned num_bytes) {
@@ -136,7 +138,7 @@ struct CombinedMemoryInterface : public sc_core::sc_module,
 	}
 
 	void flush_tlb() override {
-		mmu.flush_tlb();
+		mmu->flush_tlb();
 	}
 
 	uint32_t load_instr(uint64_t addr) override {

vp/src/platform/linux/CMakeLists.txt

@@ -1,10 +1,43 @@
 file(GLOB_RECURSE HEADERS ${CMAKE_CURRENT_SOURCE_DIR}/*.h)
+set(SOURCES
+	linux_main.cpp
+	${HEADERS})
+set(LIBS platform-common gdb-mc
+	${Boost_LIBRARIES}
+	${SystemC_LIBRARIES}
+	pthread)
 
-add_executable(linux-vp
-        linux_main.cpp
-        ${HEADERS})
+# Linux for RV32 with single worker core
+add_executable(linux32-sc-vp ${SOURCES})
+target_compile_definitions(linux32-sc-vp PUBLIC
+	TARGET_RV32
+	NUM_CORES=2)
+target_link_libraries(linux32-sc-vp rv32 ${LIBS})
 
-target_link_libraries(linux-vp rv64 platform-common gdb-mc
-	${Boost_LIBRARIES} ${SystemC_LIBRARIES} pthread)
+# Linux for RV32 with four worker cores
+add_executable(linux32-vp ${SOURCES})
+target_compile_definitions(linux32-vp PUBLIC
+	TARGET_RV32
+	NUM_CORES=5)
+target_link_libraries(linux32-vp rv32 ${LIBS})
 
-INSTALL(TARGETS linux-vp RUNTIME DESTINATION bin)
+# Linux for RV32 with single worker core
+add_executable(linux-sc-vp ${SOURCES})
+target_compile_definitions(linux-sc-vp PUBLIC
+	TARGET_RV64
+	NUM_CORES=2)
+target_link_libraries(linux-sc-vp rv64 ${LIBS})
+
+# Linux for RV32 with four worker cores
+add_executable(linux-vp ${SOURCES})
+target_compile_definitions(linux-vp PUBLIC
+	TARGET_RV64
+	NUM_CORES=5)
+target_link_libraries(linux-vp rv64 ${LIBS})
+
+INSTALL(TARGETS
+	linux32-vp
+	linux32-sc-vp
+	linux-vp
+	linux-sc-vp
+	RUNTIME DESTINATION bin)

vp/src/platform/linux/linux_main.cpp

@@ -28,18 +28,34 @@
 #include <termios.h>
 #include <unistd.h>
 
-enum {
-	NUM_CORES = 5,
-};
+/* if not defined externally fall back to TARGET_RV64 */
+#if !defined(TARGET_RV32) && !defined(TARGET_RV64)
+#define TARGET_RV64
+#endif
+
+/* if not defined externally fall back to four worker cores */
+#if !defined(NUM_CORES)
+#define NUM_CORES	(4 + 1)
+#endif
 
+#if defined(TARGET_RV32)
+using namespace rv32;
+#define MEM_SIZE_MB	1024	// MB ram
+
+#elif defined(TARGET_RV64)
 using namespace rv64;
+#define MEM_SIZE_MB	2048	// MB ram
+
+#endif /* TARGET_RVxx */
+
+
 namespace po = boost::program_options;
 
 struct LinuxOptions : public Options {
 public:
 	typedef unsigned int addr_t;
 
-	addr_t mem_size = 1024u * 1024u * 2048u;  // 2048 MB ram
+	addr_t mem_size = 1024u * 1024u * (unsigned int)(MEM_SIZE_MB);
 	addr_t mem_start_addr = 0x80000000;
 	addr_t mem_end_addr = mem_start_addr + mem_size - 1;
 	addr_t clint_start_addr = 0x02000000;
@@ -88,7 +104,7 @@ class Core {
 	InstrMemoryProxy imemif;
 
 	Core(unsigned int id, MemoryDMI dmi)
-	    : iss(id), mmu(iss), memif(("MemoryInterface" + std::to_string(id)).c_str(), iss, mmu), imemif(dmi, iss) {
+	    : iss(id), mmu(iss), memif(("MemoryInterface" + std::to_string(id)).c_str(), iss, &mmu), imemif(dmi, iss) {
 		return;
 	}
 
@@ -197,6 +213,12 @@ int sc_main(int argc, char **argv) {
 		// emulate RISC-V core boot loader
 		cores[i]->iss.regs[RegFile::a0] = cores[i]->iss.get_hart_id();
 		cores[i]->iss.regs[RegFile::a1] = opt.dtb_rom_start_addr;
+
+#ifdef TARGET_RV32
+		// configure supported instructions
+		cores[i]->iss.csrs.misa.fields.extensions |= cores[i]->iss.csrs.misa.M | cores[i]->iss.csrs.misa.A |
+			cores[i]->iss.csrs.misa.F | cores[i]->iss.csrs.misa.D;
+#endif /* TARGET_RV32 */
 	}
 
 	// OpenSBI boots all harts except hart 0 by default.