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Issues list

Issue with verilator >= 5.022
#93 opened Oct 4, 2024 by ollie-etl
Simultaneous read access on DMA
#89 opened Jun 25, 2024 by Hitz337
Conditional logging
#75 opened Dec 1, 2023 by ollie-etl
Axis DUT signal naming
#70 opened Sep 21, 2023 by davidp135
AxiLiteMaster reads forever
#53 opened Jan 1, 2023 by vacagonzalo
Small bugs at axi_slave.py
#49 opened Nov 25, 2022 by spoursalidis
ProTip! Find all open issues with in progress development work with linked:pr.