Add project logo

Signed-off-by: Wojciech Rajtar <[email protected]>
antmicro · Nov 27, 2024 · b18a889 · b18a889
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diff --git a/README.md b/README.md
@@ -1,3 +1,14 @@
+<picture>
+  <!-- User prefers light mode: -->
+  <source srcset="docs/source/img/VeeR-logo-black-rgb.png" media="(prefers-color-scheme: light)"/>
+
+  <!-- User prefers dark mode: -->
+  <source srcset="/docs/source/img/VeeR-logo-white-rgb.png"  media="(prefers-color-scheme: dark)"/>
+
+  <!-- User has no color preference: -->
+  <img src="/docs/source/img/VeeR-logo-black-rgb.png"/>
+</picture>
+
 # VeeR EL2 RISC-V Core
 
 This repository contains the VeeR EL2 RISC-V Core design RTL.

diff --git a/docs/source/img/VeeR-logo-black-rgb.png b/docs/source/img/VeeR-logo-black-rgb.png
diff --git a/docs/source/img/VeeR-logo-white-rgb.png b/docs/source/img/VeeR-logo-white-rgb.png
diff --git a/docs/source/intro.md b/docs/source/intro.md
@@ -2,7 +2,8 @@
 
 **Revision:** 1.4 December 22, 2022
 
-![Logo](img/logo.png)
+![CHIPS Alliance logo](img/logo.png)
+![VeeR project logo](img/VeeR-logo-white-rgb.png)
 
 ```
 SPDX-License-Identifier: Apache-2.0 Copyright © 2022 CHIPS Alliance.