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Feature: Accelerate BMPremote SPI data phase by removing inter-byte gaps #1946

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@ALTracer ALTracer commented Oct 1, 2024

Detailed description

  • This is a perf fix to an existing feature.
  • The existing problem is significant gaps between SPI bytes in both read and write xfers as driven by bmpflash + blackpill-f411ce (and likely others).
  • This PR solves it by providing a continuous block xfer primitive (no IRQ and no DMA involved)

Tested to increase bmpflash read -b int dump times from 35 to 31 seconds for a 8192 KiB w25q64 chip (using 12 MHz). The atomic section is used to block interrupts for 170 microseconds (256 byte read), otherwise my patch made the board hang reliably (no read timeouts). I may likely rewrite this once more using direct register manipulation as opposed to libopencm3 spi API usage. Short reads, like SFDP, indicate normal gaps between command bytes (I didn't change them) but no gaps in data page phase.
The acceleration is achieved by keeping a byte (actually 8/16-bit SPI word) in flight behind the DR shadow register, which is how it is intended to be used. DMA bindings are harder and may result in channel/stream conflicts.

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Closing issues

* Existing implementation has to walk up and down the function stack per byte,
  which is fine for commands and general poking
* 256-byte long page reads and writes can be accelerated because the length is known ahead of time
* Keep a byte in flight on stm32f1/f4 SPI (this is simpler than IRQ or DMA)
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