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chipsalliance / caliptra-sw Public

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Verilator Hardware Model

Add timeout to fpga-boss blocking UART read #8700

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Add timeout to fpga-boss blocking UART read

Add timeout to fpga-boss blocking UART read #8700

Summary
Jobs
- Verilator Build and Test
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- Usage
- Workflow file

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Run time

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Job	Run time
Verilator Build and Test	7m 40s
	7m 40s

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