build(deps): bump third_party/cores/opentitan from eec48c4 to 7e76fe2
#6239
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Bumps [third_party/cores/opentitan](https://github.com/lowRISC/opentitan) from `eec48c4` to `7e76fe2`. - [Release notes](https://github.com/lowRISC/opentitan/releases) - [Commits](lowRISC/opentitan@eec48c4...7e76fe2) --- updated-dependencies: - dependency-name: third_party/cores/opentitan dependency-type: direct:production ... Signed-off-by: dependabot[bot] <[email protected]>
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Superseded by #6247. |
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Bumps third_party/cores/opentitan from
eec48c4to7e76fe2.Commits
7e76fe2[topgen] Make toplevel SV and chiplevel templates top-sepcificd0f3500[spi_host, dv] : Add missing argument for format specificationb260e76[otbn, dv] Fixed XMR from class in SV package VCS error0ac799d[otbn, dv] Add missing ninja lib to python requirements58c6d26[kmac/dv] Add sideload_invalid test.29d22a6[sram_ctrl,dv] Add sec_cm_mem_readback test8dfb68d[rom_ctrl, dv] Fixed rom_ctrl checker fsm conditional coverage28af81a[top_darjeeling,lint,sim] Add lint and sim cfg for Darjeeling6e5b27fBump CRT to v0.4.13df4d7d5[prim] Remove prim_clock_gp_mux2Dependabot will resolve any conflicts with this PR as long as you don't alter it yourself. You can also trigger a rebase manually by commenting
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