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Disable bsg_mem_multiport_latch* and implicitport/2/3/6 #6414

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merged 1 commit into from
Nov 14, 2024

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wsnyder
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@wsnyder wsnyder commented Nov 13, 2024

Disables more illegal tests:

  • bsg_mem_multiport_latch_write_banked_bypassing.sv - Bad commenting makes illegal "end"
  • bsg_mem_multiport_latch_write_banked_bypassing_sync.sv - Likewise
  • implicitport2 - Already in disables, but had extra _ so was not blacklisted. (Test has multiple modules out of order, which breaks test harness.)
  • implicitport3 - Likewise.
  • implicitport6 - Likewise.

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Changes In Tests

Tool New Failures New Passes Added Removed Not Affected
SynligYosys 0 0 0 5 4306
Yosys 1 0 0 5 4306
Verilator 0 0 0 5 4663
tree_sitter_verilog 0 0 0 5 4494
Slang_parse 0 0 0 5 4585
yosys_slang 0 0 0 5 3845
Slang 0 0 0 5 4648
UhdmVerilator 0 0 0 5 4663
circt_verilog 0 0 0 5 4638
VeribleExtractor 0 0 0 5 4494
Icarus 0 0 0 5 4663
Surelog 0 0 0 5 4648
moore 0 0 0 5 4585
Verible 0 0 0 5 4494
tree_sitter_systemverilog 0 0 0 5 4490
Sv2v_zachjs 0 0 0 5 4648
moore_parse 0 0 0 5 4494
Odin 0 0 0 5 4585
sv_parser 0 0 0 5 4585

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@tgorochowik tgorochowik left a comment

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Thanks

@tgorochowik tgorochowik merged commit 06f55bb into chipsalliance:master Nov 14, 2024
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2 participants