[cosim] feat: write mcycle on spike_step

chipsalliance · Apr 14, 2024 · c2abd82 · c2abd82
1 parent 7423309
commit c2abd82
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diff --git a/ipemu/csrc/vbridge_impl.cc b/ipemu/csrc/vbridge_impl.cc
@@ -361,6 +361,7 @@ void VBridgeImpl::getCoverage() { return ctx->coveragep()->write(); }
 
 std::optional<SpikeEvent> VBridgeImpl::spike_step() {
   auto state = proc.get_state();
+  state->csrmap.at(CSR_MCYCLE)->write(get_t());
   auto fetch = proc.get_mmu()->load_insn(state->pc);
   auto event = create_spike_event(fetch);
 

diff --git a/tests/asm/smoke/smoke.asm b/tests/asm/smoke/smoke.asm
@@ -27,6 +27,9 @@ loop:
     addi a2, a2, -1
     bnez a2, add_test
 
+    # read cycles
+    csrr t0, mcycle
+
     ret
 
 will_not_be_executed: