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Parmys (Partial Mapper for Yosys) plugin #421

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93e53d5
libargparse pugixml
poname Dec 14, 2022
38e19bd
`parmys` plugin
poname Dec 14, 2022
d43f15c
ISC license
poname Dec 14, 2022
d043671
vtr licensing
poname Dec 14, 2022
e7cc4b8
ci
poname Dec 14, 2022
c2fbe0d
Revert "ci"
poname Dec 14, 2022
a900beb
all together
poname Dec 14, 2022
2ec748d
visualization
poname Dec 14, 2022
9cbd08f
block mem bug
poname Dec 14, 2022
b390300
warning
poname Dec 14, 2022
2c0ef3d
ci
poname Dec 14, 2022
1c35cd5
eltwiselayer rm
poname Dec 14, 2022
1751c43
eltwise_layer.v symlink
poname Dec 14, 2022
dd4e2fe
ci
poname Dec 14, 2022
cb5432a
rm files
poname Dec 14, 2022
26d3372
files symlink
poname Dec 14, 2022
4503b03
primitives symlink
poname Dec 14, 2022
ddd1cc2
ci
poname Dec 14, 2022
736593c
VexRiscv_Lite test
poname Dec 14, 2022
38d0795
ci
poname Dec 14, 2022
ba3bc5c
finalized
poname Dec 14, 2022
2d03233
mips32r1_core submodule added
poname Dec 14, 2022
c24e691
mips32r1_core test added
poname Dec 14, 2022
8277a06
all together
poname Dec 14, 2022
4fe1f8f
no libargparse
poname Dec 20, 2022
03b7b79
licensing resolved
poname Dec 20, 2022
30cc0de
Pr issues (#1)
poname Dec 20, 2022
608b352
Vtr dir (#2)
poname Dec 26, 2022
f46b99c
Merge branch 'chipsalliance:main' into parmys-plugin
poname Dec 27, 2022
cfd6c83
g++-11
poname Dec 29, 2022
714e583
g++ v
poname Dec 29, 2022
2b4bfa1
try vtr-optimized
poname Jan 2, 2023
c3c9372
vtr
poname Jan 2, 2023
6310dfe
vtr-libs test
poname Jan 3, 2023
4197e32
typo
poname Jan 3, 2023
5beb999
ci
poname Jan 3, 2023
a237d28
ci 2
poname Jan 3, 2023
3226dce
no vtr
poname Jan 3, 2023
2a908e4
vtr-gui
poname Jan 3, 2023
7b36c74
vtr
poname Jan 3, 2023
54f5f0f
yosys
poname Jan 3, 2023
ef6aaa6
retry
poname Jan 4, 2023
1692770
#2
poname Jan 4, 2023
9d14767
Merge branch 'chipsalliance:main' into lto-issue
poname Jan 4, 2023
5ef45cd
dash
poname Jan 4, 2023
ab0c502
check#3
poname Jan 4, 2023
405d737
Merge remote-tracking branch 'origin/lto-issue' into lto-issue
poname Jan 4, 2023
55bacdc
-lrtlnumber
poname Jan 4, 2023
0a3130a
symlink fixed
poname Jan 4, 2023
7da8d01
smoke test
poname Jan 4, 2023
b9739df
no smoke
poname Jan 4, 2023
7dd1c1a
cas-atlantic::vtr-libs
poname Jan 4, 2023
9d3662a
Merge branch 'chipsalliance:main' into parmys-plugin
poname Jan 4, 2023
6d94ece
cleaned
poname Jan 4, 2023
f1ff515
Merge branch 'lto-issue' into parmys-plugin
poname Jan 4, 2023
4ea5bde
all together
poname Jan 4, 2023
b1617f1
Merge branch 'chipsalliance:main' into parmys-plugin
poname Jan 10, 2023
37f9b11
Merge branch 'chipsalliance:main' into parmys-plugin
poname Jan 13, 2023
528d631
Merge branch 'chipsalliance:main' into parmys-plugin
poname Jan 17, 2023
7c983b7
Merge branch 'main' into parmys-plugin
poname Jan 24, 2023
c9f1f6c
parmys added to ci
poname Jan 24, 2023
1f934cb
Merge branch 'chipsalliance:main' into parmys-plugin
poname Feb 1, 2023
d9c6653
Merge branch 'chipsalliance:main' into parmys-plugin
poname Feb 10, 2023
f2d60ba
code re-order
poname Feb 10, 2023
c697777
done!
poname Feb 10, 2023
8352c5d
format check
poname Feb 10, 2023
504ef2e
all
poname Feb 10, 2023
80befb9
Merge branch 'chipsalliance:main' into parmys-plugin
poname Feb 16, 2023
6d74e34
Merge branch 'chipsalliance:main' into parmys-plugin
poname Feb 22, 2023
ec38226
Merge branch 'chipsalliance:main' into parmys-plugin
poname Mar 2, 2023
2e0ac37
Merge branch 'chipsalliance:main' into parmys-plugin
poname Mar 12, 2023
9507665
Merge branch 'chipsalliance:main' into parmys-plugin
poname Mar 16, 2023
130ac1d
Merge branch 'chipsalliance:main' into parmys-plugin
poname Mar 31, 2023
ed564a5
Merge branch 'chipsalliance:main' into parmys-plugin
poname Apr 13, 2023
0e33db1
Merge branch 'chipsalliance:main' into parmys-plugin
poname Apr 19, 2023
000cdf8
Merge branch 'main' into parmys-plugin
poname May 2, 2023
cc380b0
Merge branch 'chipsalliance:main' into parmys-plugin
poname May 11, 2023
d59c839
Merge branch 'chipsalliance:main' into parmys-plugin
poname May 19, 2023
619d00b
Merge branch 'chipsalliance:main' into parmys-plugin
poname Jun 1, 2023
e1ca934
Merge branch 'chipsalliance:main' into parmys-plugin
poname Jun 13, 2023
e71088c
Merge branch 'chipsalliance:main' into parmys-plugin
poname Jun 23, 2023
87fb759
Merge branch 'chipsalliance:main' into parmys-plugin
poname Aug 14, 2023
8d5cfaf
Merge branch 'chipsalliance:main' into parmys-plugin
poname Sep 3, 2023
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2 changes: 1 addition & 1 deletion .github/workflows/build-and-test.sh
100755 → 100644
Original file line number Diff line number Diff line change
Expand Up @@ -34,7 +34,7 @@ if [ "$PLUGIN_NAME" == "xdc" ] || [ "$PLUGIN_NAME" == "sdc" ]; then
fi

export CXXFLAGS=-Werror
make UHDM_INSTALL_DIR=`pwd`/env/conda/envs/yosys-plugins/ ${PLUGIN_NAME}.so -j`nproc`
make UHDM_INSTALL_DIR=`pwd`/env/conda/envs/yosys-plugins/ VTR_INSTALL_DIR=`pwd`/env/conda/envs/yosys-plugins ${PLUGIN_NAME}.so -j`nproc`
unset CXXFLAGS

end_section
Expand Down
1 change: 1 addition & 0 deletions .github/workflows/ci.yml
Original file line number Diff line number Diff line change
Expand Up @@ -38,6 +38,7 @@ jobs:
- systemverilog
- uhdm
- dsp-ff
- parmys

steps:

Expand Down
7 changes: 7 additions & 0 deletions .github/workflows/licensing.yml
Original file line number Diff line number Diff line change
Expand Up @@ -33,5 +33,12 @@ jobs:
./design_introspection-plugin/tests/selection_to_tcl_list/selection_to_tcl_list.v
./third_party/minilitex_ddr_arty/minilitex_ddr_arty.v
./third_party/VexRiscv_Lite/VexRiscv_Lite.v
./third_party/vtr_flow/verilog/eltwise_layer.v
./third_party/vtr_flow/verilog/raygentop.v
./third_party/vtr_flow/verilog/hard_block_include.v
./third_party/vtr_flow/arch/k6FracN10LB_mem20K_complexDSP_customSB_22nm.xml
./third_party/vtr_flow/arch/k6_frac_N10_frac_chain_mem32K_40nm.xml
./third_party/vtr_flow/primitives.v
third_party: |
./third_party/googletest/
.third_party/mips32r1_core/
3 changes: 3 additions & 0 deletions .gitmodules
Original file line number Diff line number Diff line change
Expand Up @@ -4,3 +4,6 @@
[submodule "third_party/make-env"]
path = third_party/make-env
url = https://github.com/SymbiFlow/make-env.git
[submodule "third_party/mips32r1_core"]
path = third_party/mips32r1_core
url = https://github.com/grantae/mips32r1_core.git
2 changes: 1 addition & 1 deletion Makefile
Original file line number Diff line number Diff line change
Expand Up @@ -24,7 +24,7 @@
# TODO: pass as -D to gcc so that modules can provide e.g. --version flags.
PLUGIN_VERSION = 1.20230808

PLUGIN_LIST := fasm xdc params sdc ql-iob design_introspection integrateinv ql-qlf systemverilog uhdm dsp-ff
PLUGIN_LIST := fasm xdc params sdc ql-iob design_introspection integrateinv ql-qlf systemverilog uhdm dsp-ff parmys
PLUGINS := $(foreach plugin,$(PLUGIN_LIST),$(plugin).so)
PLUGINS_INSTALL := $(foreach plugin,$(PLUGIN_LIST),install_$(plugin))
PLUGINS_CLEAN := $(foreach plugin,$(PLUGIN_LIST),clean_$(plugin))
Expand Down
1 change: 1 addition & 0 deletions environment.yml
Original file line number Diff line number Diff line change
Expand Up @@ -22,3 +22,4 @@ dependencies:
- litex-hub::yosys=0.17_7_g990c9b8e1=20220512_085338_py37
- litex-hub::surelog
- litex-hub::iverilog
- cas-atlantic::vtr-libs
93 changes: 93 additions & 0 deletions parmys-plugin/Makefile
Original file line number Diff line number Diff line change
@@ -0,0 +1,93 @@
# Copyright 2022 CAS—Atlantic (University of New Brunswick, CASA)
#
# Licensed under the Apache License, Version 2.0 (the "License");
# you may not use this file except in compliance with the License.
# You may obtain a copy of the License at
#
# http://www.apache.org/licenses/LICENSE-2.0
#
# Unless required by applicable law or agreed to in writing, software
# distributed under the License is distributed on an "AS IS" BASIS,
# WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
# See the License for the specific language governing permissions and
# limitations under the License.
#
# SPDX-License-Identifier: Apache-2.0

PLUGIN_DIR := $(abspath $(dir $(lastword $(MAKEFILE_LIST))))

NAME = parmys
SOURCES = parmys.cc \
parmys_arch.cc \
parmys_update.cc \
parmys_utils.cc \
parmys_resolve.cc \
core/adder.cc \
utils/enum_str.cc \
mapping/mixing_optimization.cc \
utils/read_xml_config_file.cc \
utils/odin_error.cc \
utils/odin_util.cc \
netlist/netlist_statistic.cc \
netlist/netlist_utils.cc \
netlist/netlist_cleanup.cc \
netlist/netlist_visualizer.cc \
netlist/node_utils.cc \
core/multiplier.cc \
core/subtractor.cc \
mapping/hard_soft_logic_mixer.cc \
mapping/odin_ii.cc \
utils/string_cache.cc \
mapping/partial_map.cc \
core/hard_block.cc \
core/block_memory.cc \
core/memory.cc \
utils/hash_table.cc \
utils/ast_util.cc

VTR_INSTALL_DIR ?= /usr/local

include ../Makefile_plugin.common

CXXFLAGS += -std=c++14 -Wall -W -Wextra \
-Wno-deprecated-declarations \
-Wno-unused-parameter \
-I. \
-Icore \
-Imapping \
-Inetlist \
-Iutils \
-I${VTR_INSTALL_DIR}/include/libarchfpga \
-I${VTR_INSTALL_DIR}/include/liblog \
-I${VTR_INSTALL_DIR}/include/libpugiutil \
-I${VTR_INSTALL_DIR}/include/libpugixml \
-I${VTR_INSTALL_DIR}/include/librtlnumber \
-I${VTR_INSTALL_DIR}/include/libvtrutil

LDFLAGS += -L${VTR_INSTALL_DIR}/lib \
-L${VTR_INSTALL_DIR}/bin

LDLIBS += -larchfpga \
-lvtrutil \
-llog \
-lpugixml \
-lpugiutil \
-lrtlnumber \
-lpthread

TECHLIBS_DIR = techlibs
VERILOG_MODULES = adff2dff.v \
adffe2dff.v \
aldff2dff.v \
aldffe2dff.v \
vtr_primitives.v

install_modules:
$(foreach f, $(wildcard $(TECHLIBS_DIR)/*), install -D $(f) $(YOSYS_DATA_DIR)/parmys/$(notdir $(f));)

install: install_modules

clean_modules:
rm -rf ./third_party

clean: clean_modules
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