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Add support for reduced core AVR and fix location of ws2812_config.h
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cpldcpu committed May 1, 2024
1 parent 6c732b2 commit 52b7c2e
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Showing 3 changed files with 28 additions and 6 deletions.
3 changes: 3 additions & 0 deletions README.md
Original file line number Diff line number Diff line change
Expand Up @@ -150,6 +150,9 @@ Release History
- Updated Arduino library archive
- Fixed an issue where the config include was not used
- Support for LGT8F
- v2.6rc 2024/05/01
- Re-added support for reduced core AVR that was broken in v2.5
- Fixed location of ws2812_config.h


You can find the old V1 here: https://github.com/cpldcpu/light_ws2812/tree/v1.0
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31 changes: 25 additions & 6 deletions light_ws2812_AVR/Light_WS2812/light_ws2812.c
Original file line number Diff line number Diff line change
Expand Up @@ -56,20 +56,20 @@ void ws2812_sendarray(uint8_t *data,uint16_t datlen)
#define w_totalperiod 1250

// Fixed cycles used by the inner loop
#if defined(__LGT8F__)
#if defined(__LGT8F__) // LGT8F88A
#define w_fixedlow 4
#define w_fixedhigh 6
#define w_fixedtotal 10
#else
#elif __AVR_ARCH__ == 100 // reduced core AVR
#define w_fixedlow 2
#define w_fixedhigh 4
#define w_fixedtotal 8
#else // all others
#define w_fixedlow 3
#define w_fixedhigh 6
#define w_fixedtotal 10
#endif

// // Fixed cycles used by the inner loop
// #define w_fixedlow 2
// #define w_fixedhigh 4
// #define w_fixedtotal 8

// Insert NOPs to match the timing, if possible
#define w_zerocycles (((F_CPU/1000)*w_zeropulse )/1000000)
Expand Down Expand Up @@ -125,7 +125,9 @@ void inline ws2812_sendarray_mask(uint8_t *data,uint16_t datlen,uint8_t maskhi)
{
uint8_t curbyte,ctr,masklo;
uint8_t sreg_prev;
#if __AVR_ARCH__ != 100
uint8_t *port = (uint8_t*) _SFR_MEM_ADDR(ws2812_PORTREG);
#endif

ws2812_DDRREG |= maskhi; // Enable output

Expand All @@ -146,7 +148,11 @@ void inline ws2812_sendarray_mask(uint8_t *data,uint16_t datlen,uint8_t maskhi)
" clt \n\t"
#endif
"loop%=: \n\t"
#if __AVR_ARCH__ == 100
" out %2,%3 \n\t" // '1' [01] '0' [01] - re
#else
" st X,%3 \n\t" // '1' [02] '0' [02] - re
#endif

#if (w1_nops&1)
w_nop1
Expand All @@ -168,6 +174,10 @@ w_nop16
" brts 1f \n\t" // '1' [04] '0' [03]
" st X,%4 \n\t" // '1' [--] '0' [04] - fe-low
"1: lsl %1 \n\t" // '1' [05] '0' [05]
#elif __AVR_ARCH__ == 100
" sbrs %1,7 \n\t" // '1' [03] '0' [02]
" out %2,%4 \n\t" // '1' [--] '0' [03] - fe-low
" lsl %1 \n\t" // '1' [04] '0' [04]
#else
" sbrs %1,7 \n\t" // '1' [04] '0' [03]
" st X,%4 \n\t" // '1' [--] '0' [05] - fe-low
Expand All @@ -188,9 +198,13 @@ w_nop16
#if (w2_nops&16)
w_nop16
#endif
#if __AVR_ARCH__ == 100
" out %2,%4 \n\t" // '1' [+1] '0' [+1] - fe-high
#else
" brcc skipone%= \n\t" // '1' [+1] '0' [+2] -
" st X,%4 \n\t" // '1' [+3] '0' [--] - fe-high
"skipone%=: " // '1' [+3] '0' [+2] -
#endif
#if (w3_nops&1)
w_nop1
#endif
Expand All @@ -210,7 +224,12 @@ w_nop16
" dec %0 \n\t" // '1' [+4] '0' [+3]
" brne loop%=\n\t" // '1' [+5] '0' [+4]
: "=&d" (ctr)
#if __AVR_ARCH__ == 100
: "r" (curbyte), "I" (_SFR_IO_ADDR(ws2812_PORTREG)), "r" (maskhi), "r" (masklo)
#else
: "r" (curbyte), "x" (port), "r" (maskhi), "r" (masklo)
#endif

);
}

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