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Slang linter for Verilog/SystemVerilog. #4713

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merged 1 commit into from
Feb 22, 2024

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AlvinRolling
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This contribution incorporates the slang linting tools for Verilog/SystemVerilog.

The contribution here follows the ale-development guidelines. Two linter tests have been added, and all tests have passed.

Details about the changes are described in this article.

An example of the results in Vim is shown below:
slang_vim_ale

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@hsanson hsanson left a comment

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LGTM, thanks.

@hsanson hsanson merged commit 52c6146 into dense-analysis:master Feb 22, 2024
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