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Fix OpenXL Warnings #7445

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4 changes: 2 additions & 2 deletions compiler/codegen/OMRCodeGenerator.cpp
Original file line number Diff line number Diff line change
Expand Up @@ -1270,13 +1270,13 @@ bool OMR::CodeGenerator::traceBCDCodeGen()
return self()->comp()->getOption(TR_TraceCG);
}

void OMR::CodeGenerator::traceBCDEntry(char *str, TR::Node *node)
void OMR::CodeGenerator::traceBCDEntry(const char *str, TR::Node *node)
{
if (self()->traceBCDCodeGen())
traceMsg(self()->comp(),"EVAL: %s 0x%p - start\n",str,node);
}

void OMR::CodeGenerator::traceBCDExit(char *str, TR::Node *node)
void OMR::CodeGenerator::traceBCDExit(const char *str, TR::Node *node)
{
if (self()->traceBCDCodeGen())
traceMsg(self()->comp(),"EVAL: %s 0x%p - end\n",str,node);
Expand Down
4 changes: 2 additions & 2 deletions compiler/codegen/OMRCodeGenerator.hpp
Original file line number Diff line number Diff line change
Expand Up @@ -1416,8 +1416,8 @@ class OMR_EXTENSIBLE CodeGenerator
//Rather confusingly not used -only- in BCD related codegen.
//... has leaked into non-BCD code.
bool traceBCDCodeGen();
void traceBCDEntry(char *str, TR::Node *node);
void traceBCDExit(char *str, TR::Node *node);
void traceBCDEntry(const char *str, TR::Node *node);
void traceBCDExit(const char *str, TR::Node *node);

TR_BitVector *getLiveButMaybeUnreferencedLocals() {return _liveButMaybeUnreferencedLocals;}
TR_BitVector *setLiveButMaybeUnreferencedLocals(TR_BitVector *v) {return (_liveButMaybeUnreferencedLocals = v);}
Expand Down
2 changes: 1 addition & 1 deletion compiler/optimizer/OMRCFGSimplifier.cpp
Original file line number Diff line number Diff line change
Expand Up @@ -931,7 +931,7 @@ bool OMR::CFGSimplifier::simplifySimpleStore(bool needToDuplicateTree)
if (trace())
traceMsg(comp(), "End simplifySimpleStore. New select node is n%dn\n", select->getGlobalIndex());

TR::Block *dest;
TR::Block *dest = NULL;
if (diamond) {
dest = toBlock(_next1->getSuccessors().front()->getTo());
_cfg->addEdge(_block, dest);
Expand Down
4 changes: 2 additions & 2 deletions compiler/optimizer/OMRSimplifierHandlers.cpp
Original file line number Diff line number Diff line change
Expand Up @@ -1890,7 +1890,7 @@ static TR::Node *intDemoteSimplifier(TR::Node * node, TR::Block * block, TR::Sim
// / \
// subtree lconst 22
//
int64_t andVal;
int64_t andVal = 0;
switch (targetSize)
{
case 1: andVal = 0xFF; break;
Expand Down Expand Up @@ -3356,7 +3356,7 @@ TR::Node *getQuotientUsingMagicNumberMultiply(TR::Node *node, TR::Block *block,
TR::Node * firstChild = node->getFirstChild(), * secondChild = node->getSecondChild();

// the node we'll create and return to the caller
TR::Node * replacementNode;
TR::Node * replacementNode = NULL;

if(node->getOpCodeValue() == TR::idiv || node->getOpCodeValue() == TR::irem)
{
Expand Down
6 changes: 4 additions & 2 deletions compiler/ras/Debug.cpp
Original file line number Diff line number Diff line change
Expand Up @@ -5084,7 +5084,8 @@ void TR_Debug::setupDebugger(void *startaddr, void *endaddr, bool before)
Argv[0] = "/tr/zos-tools/bin/dbxattach";
// for break_before, although command file is always the same,
// we generate it dynamically for consistency with other platforms
if (cf = fopen(cfname, "wb+"))
cf = fopen(cfname, "wb+");
if (NULL != cf)
{
fprintf(cf, "set $unsafebps\n");
fprintf(cf, "set $unsafegoto\n");
Expand Down Expand Up @@ -5115,7 +5116,8 @@ void TR_Debug::setupDebugger(void *startaddr, void *endaddr, bool before)
fclose(cf);
}
// check for dbx that cfname file could be read (dbx does not do this check)
if (cf = fopen(cfname, "r"))
cf = fopen(cfname, "r");
if (NULL != cf)
{
struct inheritance inh = { 0 }; /* use all the default inheritance stuff */
int fdCount = 0; /* inherit all file descriptors from parent */
Expand Down
15 changes: 10 additions & 5 deletions compiler/z/codegen/BinaryEvaluator.cpp
Original file line number Diff line number Diff line change
Expand Up @@ -1226,7 +1226,8 @@ genericLongShiftSingle(TR::Node * node, TR::CodeGenerator * cg, TR::InstOpCode::
}
else if (firstChild->getOpCodeValue() == TR::land && firstChild->getReferenceCount() == 1)
{
if (trgReg = TR::TreeEvaluator::tryToReplaceShiftLandWithRotateInstruction(firstChild, cg, value, node->getOpCodeValue() == TR::lshl))
trgReg = TR::TreeEvaluator::tryToReplaceShiftLandWithRotateInstruction(firstChild, cg, value, node->getOpCodeValue() == TR::lshl);
if (NULL != trgReg)
{
node->setRegister(trgReg);
cg->decReferenceCount(firstChild);
Expand All @@ -1240,7 +1241,8 @@ genericLongShiftSingle(TR::Node * node, TR::CodeGenerator * cg, TR::InstOpCode::
// Generate RISBGN for (lshr + land) and (lushr + land) sequences
if (firstChild->getOpCodeValue() == TR::land && firstChild->getReferenceCount() == 1)
{
if (trgReg = TR::TreeEvaluator::tryToReplaceShiftLandWithRotateInstruction(firstChild, cg, -value, node->getOpCodeValue() == TR::lshr))
trgReg = TR::TreeEvaluator::tryToReplaceShiftLandWithRotateInstruction(firstChild, cg, -value, node->getOpCodeValue() == TR::lshr);
if (NULL != trgReg)
{
node->setRegister(trgReg);
cg->decReferenceCount(firstChild);
Expand Down Expand Up @@ -3350,7 +3352,8 @@ OMR::Z::TreeEvaluator::iandEvaluator(TR::Node * node, TR::CodeGenerator * cg)
TR::Node * firstChild = node->getFirstChild();
TR::Node * secondChild = node->getSecondChild();

if (targetRegister = genericRotateAndInsertHelper(node, cg))
targetRegister = genericRotateAndInsertHelper(node, cg);
if (NULL != targetRegister)
{
node->setRegister(targetRegister);

Expand Down Expand Up @@ -3501,7 +3504,8 @@ OMR::Z::TreeEvaluator::lorEvaluator(TR::Node * node, TR::CodeGenerator * cg)

// See if rotate-left can be used
//
if (targetRegister = genericRotateLeft(node, cg))
targetRegister = genericRotateLeft(node, cg);
if (NULL != targetRegister)
{
node->setRegister(targetRegister);

Expand Down Expand Up @@ -3604,7 +3608,8 @@ OMR::Z::TreeEvaluator::lxorEvaluator(TR::Node * node, TR::CodeGenerator * cg)

// See if rotate-left can be used
//
if (targetRegister = genericRotateLeft(node, cg))
targetRegister = genericRotateLeft(node, cg);
if (NULL != targetRegister)
{
node->setRegister(targetRegister);

Expand Down
2 changes: 2 additions & 0 deletions compiler/z/codegen/ControlFlowEvaluator.cpp
Original file line number Diff line number Diff line change
Expand Up @@ -743,6 +743,8 @@ OMR::Z::TreeEvaluator::returnEvaluator(TR::Node * node, TR::CodeGenerator * cg)
case TR::Return:
comp->setReturnInfo(TR_VoidReturn);
break;
default:
break;
}

TR::Instruction * inst = generateS390PseudoInstruction(cg, TR::InstOpCode::retn, node, dependencies);
Expand Down
23 changes: 18 additions & 5 deletions compiler/z/codegen/OMRMachine.cpp
Original file line number Diff line number Diff line change
Expand Up @@ -153,6 +153,8 @@ OMR::Z::Machine::registerCopy(TR::CodeGenerator* cg,
case TR_VRF:
cursor = generateVRRaInstruction(cg, TR::InstOpCode::VLR, node, targetReg, sourceReg, precedingInstruction);
break;
default:
break;
}

cg->traceRAInstruction(cursor);
Expand Down Expand Up @@ -2112,7 +2114,8 @@ OMR::Z::Machine::findBestFreeRegister(TR::Instruction *currentInstruction,
}
else
{
if (bestRegister = self()->findBestLegalEvenRegister(availRegMask))
bestRegister = self()->findBestLegalEvenRegister(availRegMask);
if (NULL != bestRegister)
// Set the pair's sibling to a high weight so that assignment to this real reg is unlikely
{
_registerFile[toRealRegister(bestRegister)->getRegisterNumber() + 1]->setWeight(S390_REGISTER_PAIR_SIBLING);
Expand Down Expand Up @@ -2161,7 +2164,8 @@ OMR::Z::Machine::findBestFreeRegister(TR::Instruction *currentInstruction,
}
else
{
if (bestRegister = self()->findBestLegalOddRegister(availRegMask))
bestRegister = self()->findBestLegalOddRegister(availRegMask);
if (NULL != bestRegister)
// Set the pair's sibling to a high weight so that assignment to this real reg is unlikely
{
_registerFile[toRealRegister(bestRegister)->getRegisterNumber() - 1]->setWeight(S390_REGISTER_PAIR_SIBLING);
Expand Down Expand Up @@ -2200,7 +2204,8 @@ OMR::Z::Machine::findBestFreeRegister(TR::Instruction *currentInstruction,
}
else
{
if (bestRegister = self()->findBestLegalSiblingFPRegister(true,availRegMask))
bestRegister = self()->findBestLegalSiblingFPRegister(true,availRegMask);
if (NULL != bestRegister)
// Set the pair's sibling to a high weight so that assignment to this real reg is unlikely
{
_registerFile[toRealRegister(bestRegister)->getRegisterNumber() + 2]->setWeight(S390_REGISTER_PAIR_SIBLING);
Expand Down Expand Up @@ -2239,7 +2244,8 @@ OMR::Z::Machine::findBestFreeRegister(TR::Instruction *currentInstruction,
}
else
{
if (bestRegister = self()->findBestLegalSiblingFPRegister(false,availRegMask))
bestRegister = self()->findBestLegalSiblingFPRegister(false,availRegMask);
if (NULL != bestRegister)
// Set the pair's sibling to a high weight so that assignment to this real reg is unlikely
{
_registerFile[toRealRegister(bestRegister)->getRegisterNumber() - 2]->setWeight(S390_REGISTER_PAIR_SIBLING);
Expand Down Expand Up @@ -2470,6 +2476,8 @@ OMR::Z::Machine::freeBestRegister(TR::Instruction * currentInstruction, TR::Regi
maskI = first = TR::RealRegister::FirstVRF;
last = TR::RealRegister::LastVRF;
break;
default:
break;
}

int32_t preference = 0, pref_favored = 0;
Expand Down Expand Up @@ -2665,6 +2673,8 @@ OMR::Z::Machine::spillRegister(TR::Instruction * currentInstruction, TR::Registe

opCode = TR::InstOpCode::VL;
break;
default:
break;
}

TR::MemoryReference * tempMR = generateS390MemoryReference(currentNode, location->getSymbolReference(), self()->cg());
Expand Down Expand Up @@ -2838,6 +2848,8 @@ OMR::Z::Machine::reverseSpillState(TR::Instruction *currentInstruction,
dataSize = 16;
opCode = TR::InstOpCode::VST;
break;
default:
break;
}

if (self()->cg()->isOutOfLineColdPath())
Expand Down Expand Up @@ -3219,7 +3231,8 @@ OMR::Z::Machine::coerceRegisterAssignment(TR::Instruction
// to prevent exception in findBestSwapRegister
currentTargetVirtual->setAssignedRegister(targetRegister);

if (reg = self()->findBestSwapRegister(virtualRegister, currentTargetVirtual))
reg = self()->findBestSwapRegister(virtualRegister, currentTargetVirtual);
if (NULL != reg)
{
spareReg = reg;
}
Expand Down