v0.1.0
New Features
- Classes for
Project
,Design
,VHDLLibrary
,FileSet
,File
. - pytest based test cases.
- Sphinx based documentation.
Changes
- Version enumeration
VHDLVersion
moved to pyVHDLModel. - Version enumerations
VerilogVersion
andSystemVerilogVersion
moved to pySVModel.
Bug Fixes
- None