fix GL uvm simulation

efabless · May 9, 2024 · 64e4192 · 64e4192
1 parent 5a6352c
commit 64e4192
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Showing 3 changed files with 3 additions and 3 deletions.
diff --git a/hdl/rtl/bus_wrappers/EF_TMR32_AHBL.pp.v b/hdl/rtl/bus_wrappers/EF_TMR32_AHBL.pp.v
@@ -100,7 +100,7 @@ module EF_TMR32_AHBL #(
 	wire [32-1:0]	tmr;
 	wire [1-1:0]	matchx_flag;
 	wire [1-1:0]	matchy_flag;
-	wire [1-1:0]	timeout_flag;
+	(* keep *) wire [1-1:0]	timeout_flag;
 
 	// Register Definitions
 	wire [32-1:0]	TMR_WIRE;

diff --git a/hdl/rtl/bus_wrappers/EF_TMR32_APB.pp.v b/hdl/rtl/bus_wrappers/EF_TMR32_APB.pp.v
@@ -85,7 +85,7 @@ module EF_TMR32_APB #(
 	wire [32-1:0]	tmr;
 	wire [1-1:0]	matchx_flag;
 	wire [1-1:0]	matchy_flag;
-	wire [1-1:0]	timeout_flag;
+	(* keep *) wire [1-1:0]	timeout_flag;
 
 	// Register Definitions
 	wire [32-1:0]	TMR_WIRE;

diff --git a/hdl/rtl/bus_wrappers/EF_TMR32_WB.pp.v b/hdl/rtl/bus_wrappers/EF_TMR32_WB.pp.v
@@ -88,7 +88,7 @@ module EF_TMR32_WB #(
 	wire [32-1:0]	tmr;
 	wire [1-1:0]	matchx_flag;
 	wire [1-1:0]	matchy_flag;
-	wire [1-1:0]	timeout_flag;
+	(* keep *) wire [1-1:0]	timeout_flag;
 
 	// Register Definitions
 	wire [32-1:0]	TMR_WIRE;