MdePkg.dec: RISC-V: Define override bit for Sstc extension

Define the BIT 1 as the override bit for Sstc extension. This will be used by the timer driver to decide whether to use SBI calls or direct CSR access to configure the timer. Cc: Liming Gao <[email protected]> Cc: Michael D Kinney <[email protected]> Cc: Zhiguang Liu <[email protected]> Cc: Andrei Warkentin <[email protected]> Signed-off-by: Sunil V L <[email protected]> Reviewed-by: Andrei Warkentin <[email protected]>
ellyq · Jan 11, 2024 · fd629ef · fd629ef
1 parent 889535c
commit fd629ef
Showing 1 changed file with 2 additions and 0 deletions.
diff --git a/MdePkg/MdePkg.dec b/MdePkg/MdePkg.dec
@@ -2405,6 +2405,8 @@
   # Configurability to override RISC-V CPU Features
   # BIT 0 = Cache Management Operations. This bit is relevant only if
   # previous stage has feature enabled and user wants to disable it.
+  # BIT 1 = Supervisor Time Compare (Sstc). This bit is relevant only if
+  # previous stage has feature enabled and user wants to disable it.
   #
   gEfiMdePkgTokenSpaceGuid.PcdRiscVFeatureOverride|0xFFFFFFFFFFFFFFFF|UINT64|0x69