Add initial Drop for numerous drivers

esp-hal/src/aes/esp32.rs

@@ -5,7 +5,7 @@ use crate::{
 
 impl<'d> Aes<'d> {
     pub(super) fn init(&mut self) {
-        PeripheralClockControl::enable(PeripheralEnable::Aes);
+        PeripheralClockControl::enable(PeripheralEnable::Aes, true);
         self.write_endianness(
             Endianness::BigEndian,
             Endianness::BigEndian,

esp-hal/src/aes/esp32cX.rs

@@ -5,7 +5,7 @@ use crate::{
 
 impl Aes<'_> {
     pub(super) fn init(&mut self) {
-        PeripheralClockControl::enable(PeripheralEnable::Aes);
+        PeripheralClockControl::enable(PeripheralEnable::Aes, true);
         self.write_dma(false);
     }
 

esp-hal/src/aes/esp32s2.rs

@@ -5,7 +5,7 @@ use crate::{
 
 impl<'d> Aes<'d> {
     pub(super) fn init(&mut self) {
-        PeripheralClockControl::enable(PeripheralEnable::Aes);
+        PeripheralClockControl::enable(PeripheralEnable::Aes, true);
         self.write_dma(false);
         self.write_endianness(
             Endianness::BigEndian,

esp-hal/src/aes/esp32s3.rs

@@ -5,7 +5,7 @@ use crate::{
 
 impl<'d> Aes<'d> {
     pub(super) fn init(&mut self) {
-        PeripheralClockControl::enable(PeripheralEnable::Aes);
+        PeripheralClockControl::enable(PeripheralEnable::Aes, true);
         self.write_dma(false);
     }
 

esp-hal/src/aes/mod.rs

@@ -59,6 +59,8 @@ use crate::{
     peripheral::{Peripheral, PeripheralRef},
     peripherals::AES,
     reg_access::{AlignmentHelper, NativeEndianess},
+    system,
+    system::PeripheralClockControl,
 };
 
 #[cfg_attr(esp32, path = "esp32.rs")]
@@ -143,8 +145,8 @@ impl<'d> Aes<'d> {
     pub fn new(aes: impl Peripheral<P = AES> + 'd) -> Self {
         crate::into_ref!(aes);
 
-        crate::system::PeripheralClockControl::reset(crate::system::Peripheral::Aes);
-        crate::system::PeripheralClockControl::enable(crate::system::Peripheral::Aes);
+        PeripheralClockControl::reset(system::Peripheral::Aes);
+        PeripheralClockControl::enable(system::Peripheral::Aes, true);
 
         let mut ret = Self {
             aes,
@@ -190,6 +192,12 @@ impl<'d> Aes<'d> {
     }
 }
 
+impl<'d> Drop for Aes<'d> {
+    fn drop(&mut self) {
+        PeripheralClockControl::enable(system::Peripheral::Aes, false);
+    }
+}
+
 /// Specifications for AES flavours
 pub trait AesFlavour: crate::private::Sealed {
     /// Type of the AES key, a fixed-size array of bytes

esp-hal/src/analog/adc/riscv.rs

@@ -409,7 +409,7 @@ where
         config: AdcConfig<ADCI>,
     ) -> Self {
         PeripheralClockControl::reset(Peripheral::ApbSarAdc);
-        PeripheralClockControl::enable(Peripheral::ApbSarAdc);
+        PeripheralClockControl::enable(Peripheral::ApbSarAdc, true);
 
         unsafe { &*APB_SARADC::PTR }.ctrl().modify(|_, w| unsafe {
             w.start_force().set_bit();
@@ -500,6 +500,12 @@ where
     }
 }
 
+impl<'d, ADCI> Drop for Adc<'d, ADCI> {
+    fn drop(&mut self) {
+        PeripheralClockControl::enable(Peripheral::ApbSarAdc, false);
+    }
+}
+
 #[cfg(any(esp32c2, esp32c3, esp32c6))]
 impl super::AdcCalEfuse for crate::peripherals::ADC1 {
     fn get_init_code(atten: Attenuation) -> Option<u16> {

esp-hal/src/analog/adc/xtensa.rs

@@ -402,7 +402,7 @@ where
         config: AdcConfig<ADCI>,
     ) -> Self {
         PeripheralClockControl::reset(Peripheral::ApbSarAdc);
-        PeripheralClockControl::enable(Peripheral::ApbSarAdc);
+        PeripheralClockControl::enable(Peripheral::ApbSarAdc, true);
 
         let sensors = unsafe { &*SENS::ptr() };
 
@@ -560,6 +560,12 @@ where
     }
 }
 
+impl<'d, ADCI> Drop for Adc<'d, ADCI> {
+    fn drop(&mut self) {
+        PeripheralClockControl::enable(Peripheral::ApbSarAdc, false);
+    }
+}
+
 #[cfg(esp32s3)]
 impl super::AdcCalEfuse for crate::peripherals::ADC1 {
     fn get_init_code(atten: Attenuation) -> Option<u16> {

esp-hal/src/dma/gdma.rs

@@ -662,7 +662,7 @@ impl<'d> Dma<'d> {
     ) -> Dma<'d> {
         crate::into_ref!(dma);
 
-        PeripheralClockControl::enable(Peripheral::Gdma);
+        PeripheralClockControl::enable(Peripheral::Gdma, true);
         dma.misc_conf().modify(|_, w| w.ahbm_rst_inter().set_bit());
         dma.misc_conf()
             .modify(|_, w| w.ahbm_rst_inter().clear_bit());

esp-hal/src/dma/pdma.rs

@@ -878,7 +878,7 @@ impl<'d> Dma<'d> {
     pub fn new(
         dma: impl crate::peripheral::Peripheral<P = crate::peripherals::DMA> + 'd,
     ) -> Dma<'d> {
-        PeripheralClockControl::enable(Peripheral::Dma);
+        PeripheralClockControl::enable(Peripheral::Dma, true);
 
         #[cfg(esp32)]
         {

esp-hal/src/ecc.rs

@@ -103,7 +103,7 @@ impl<'d> Ecc<'d, crate::Blocking> {
         crate::into_ref!(ecc);
 
         PeripheralClockControl::reset(PeripheralEnable::Ecc);
-        PeripheralClockControl::enable(PeripheralEnable::Ecc);
+        PeripheralClockControl::enable(PeripheralEnable::Ecc, true);
 
         Self {
             ecc,
@@ -113,6 +113,12 @@ impl<'d> Ecc<'d, crate::Blocking> {
     }
 }
 
+impl<'d, DM: crate::Mode> Drop for Ecc<'d, DM> {
+    fn drop(&mut self) {
+        PeripheralClockControl::enable(PeripheralEnable::Ecc, false);
+    }
+}
+
 impl crate::private::Sealed for Ecc<'_, crate::Blocking> {}
 
 impl InterruptConfigurable for Ecc<'_, crate::Blocking> {

esp-hal/src/etm.rs

@@ -152,7 +152,7 @@ macro_rules! create_etm {
                     crate::into_ref!(peripheral);
 
                     PeripheralClockControl::reset(crate::system::Peripheral::Etm);
-                    PeripheralClockControl::enable(crate::system::Peripheral::Etm);
+                    PeripheralClockControl::enable(crate::system::Peripheral::Etm, true);
 
                     Self {
                         _peripheral: peripheral,

esp-hal/src/hmac.rs

@@ -108,7 +108,7 @@ impl<'d> Hmac<'d> {
         crate::into_ref!(hmac);
 
         PeripheralClockControl::reset(PeripheralEnable::Hmac);
-        PeripheralClockControl::enable(PeripheralEnable::Hmac);
+        PeripheralClockControl::enable(PeripheralEnable::Hmac, true);
 
         Self {
             hmac,
@@ -345,3 +345,9 @@ impl<'d> Hmac<'d> {
         while self.is_busy() {}
     }
 }
+
+impl<'d> Drop for Hmac<'d> {
+    fn drop(&mut self) {
+        PeripheralClockControl::enable(PeripheralEnable::Hmac, false);
+    }
+}

esp-hal/src/i2c.rs

@@ -324,7 +324,7 @@ where
         };
 
         PeripheralClockControl::reset(i2c.i2c.peripheral());
-        PeripheralClockControl::enable(i2c.i2c.peripheral());
+        PeripheralClockControl::enable(i2c.i2c.peripheral(), true);
 
         // TODO: implement with_pins et. al.
         // avoid SCL/SDA going low during configuration
@@ -351,7 +351,7 @@ where
 
     fn internal_recover(&self) {
         PeripheralClockControl::reset(self.i2c.peripheral());
-        PeripheralClockControl::enable(self.i2c.peripheral());
+        PeripheralClockControl::enable(self.i2c.peripheral(), true);
 
         self.i2c.setup(self.frequency, self.timeout);
     }

esp-hal/src/i2s/master.rs

@@ -289,7 +289,7 @@ where
         // the targets the same and force same configuration for both, TX and RX
 
         PeripheralClockControl::reset(i2s.peripheral());
-        PeripheralClockControl::enable(i2s.peripheral());
+        PeripheralClockControl::enable(i2s.peripheral(), true);
         i2s.set_clock(calculate_clock(sample_rate, 2, data_format.channel_bits()));
         i2s.configure(&standard, &data_format);
         i2s.set_master();

esp-hal/src/i2s/parallel.rs

@@ -223,7 +223,7 @@ where
         let channel = channel.degrade();
 
         PeripheralClockControl::reset(i2s.peripheral());
-        PeripheralClockControl::enable(i2s.peripheral());
+        PeripheralClockControl::enable(i2s.peripheral(), true);
         // configure the I2S peripheral for parallel mode
         i2s.setup(frequency, pins.bus_width());
         // setup the clock pin

esp-hal/src/lcd_cam/mod.rs

@@ -39,7 +39,7 @@ impl<'d> LcdCam<'d, Blocking> {
         crate::into_ref!(lcd_cam);
 
         PeripheralClockControl::reset(system::Peripheral::LcdCam);
-        PeripheralClockControl::enable(system::Peripheral::LcdCam);
+        PeripheralClockControl::enable(system::Peripheral::LcdCam, true);
 
         Self {
             lcd: Lcd {

esp-hal/src/ledc/mod.rs

@@ -114,7 +114,7 @@ impl<'d> Ledc<'d> {
         crate::into_ref!(_instance);
 
         PeripheralClockControl::reset(PeripheralEnable::Ledc);
-        PeripheralClockControl::enable(PeripheralEnable::Ledc);
+        PeripheralClockControl::enable(PeripheralEnable::Ledc, true);
 
         let ledc = unsafe { &*crate::peripherals::LEDC::ptr() };
         Ledc { _instance, ledc }
@@ -173,3 +173,9 @@ impl<'d> Ledc<'d> {
         Channel::new(number, output_pin)
     }
 }
+
+impl<'d> Drop for Ledc<'d> {
+    fn drop(&mut self) {
+        PeripheralClockControl::enable(PeripheralEnable::Ledc, false);
+    }
+}

esp-hal/src/mcpwm/mod.rs

@@ -135,7 +135,7 @@ impl<'d, PWM: PwmPeripheral> McPwm<'d, PWM> {
         crate::into_ref!(peripheral);
 
         PWM::reset();
-        PWM::enable();
+        PWM::enable(true);
 
         #[cfg(not(esp32c6))]
         {
@@ -317,7 +317,7 @@ pub struct FrequencyError;
 /// A MCPWM peripheral
 pub trait PwmPeripheral: Deref<Target = RegisterBlock> + crate::private::Sealed {
     /// Enable peripheral
-    fn enable();
+    fn enable(enable: bool);
     /// Reset peripheral
     fn reset();
     /// Get a pointer to the peripheral RegisterBlock
@@ -328,8 +328,8 @@ pub trait PwmPeripheral: Deref<Target = RegisterBlock> + crate::private::Sealed
 
 #[cfg(mcpwm0)]
 impl PwmPeripheral for crate::peripherals::MCPWM0 {
-    fn enable() {
-        PeripheralClockControl::enable(PeripheralEnable::Mcpwm0)
+    fn enable(enable: bool) {
+        PeripheralClockControl::enable(PeripheralEnable::Mcpwm0, enable)
     }
 
     fn reset() {
@@ -355,8 +355,8 @@ impl PwmPeripheral for crate::peripherals::MCPWM0 {
 
 #[cfg(mcpwm1)]
 impl PwmPeripheral for crate::peripherals::MCPWM1 {
-    fn enable() {
-        PeripheralClockControl::enable(PeripheralEnable::Mcpwm1)
+    fn enable(enable: bool) {
+        PeripheralClockControl::enable(PeripheralEnable::Mcpwm1, enable)
     }
 
     fn reset() {

esp-hal/src/otg_fs.rs

@@ -71,7 +71,7 @@ impl<'d> Usb<'d> {
         M: UsbDm + Send + Sync,
     {
         PeripheralClockControl::reset(PeripheralEnable::Usb);
-        PeripheralClockControl::enable(PeripheralEnable::Usb);
+        PeripheralClockControl::enable(PeripheralEnable::Usb, true);
 
         Self {
             _usb0: usb0.into_ref(),
@@ -110,6 +110,12 @@ impl<'d> Usb<'d> {
     }
 }
 
+impl<'d> Drop for Usb<'d> {
+    fn drop(&mut self) {
+        PeripheralClockControl::enable(PeripheralEnable::Usb, false);
+    }
+}
+
 unsafe impl<'d> Sync for Usb<'d> {}
 
 unsafe impl<'d> UsbPeripheral for Usb<'d> {

esp-hal/src/parl_io.rs

@@ -1275,7 +1275,7 @@ fn internal_init(frequency: HertzU32) -> Result<(), Error> {
     }
 
     PeripheralClockControl::reset(crate::system::Peripheral::ParlIo);
-    PeripheralClockControl::enable(crate::system::Peripheral::ParlIo);
+    PeripheralClockControl::enable(crate::system::Peripheral::ParlIo, true);
 
     let pcr = unsafe { &*crate::peripherals::PCR::PTR };
 

esp-hal/src/pcnt/mod.rs

@@ -65,7 +65,7 @@ impl<'d> Pcnt<'d> {
 
         // Enable the PCNT peripherals clock in the system peripheral
         PeripheralClockControl::reset(crate::system::Peripheral::Pcnt);
-        PeripheralClockControl::enable(crate::system::Peripheral::Pcnt);
+        PeripheralClockControl::enable(crate::system::Peripheral::Pcnt, true);
 
         let pcnt = unsafe { &*crate::peripherals::PCNT::ptr() };
 
@@ -109,6 +109,12 @@ impl<'d> Pcnt<'d> {
     }
 }
 
+impl<'d> Drop for Pcnt<'d> {
+    fn drop(&mut self) {
+        PeripheralClockControl::enable(crate::system::Peripheral::Pcnt, false);
+    }
+}
+
 impl crate::private::Sealed for Pcnt<'_> {}
 
 impl InterruptConfigurable for Pcnt<'_> {

esp-hal/src/rmt.rs

@@ -89,6 +89,7 @@ use core::{
 use embassy_sync::waitqueue::AtomicWaker;
 use enumset::{EnumSet, EnumSetType};
 use fugit::HertzU32;
+use portable_atomic::{AtomicU8, Ordering::Relaxed};
 
 use crate::{
     gpio::interconnect::{PeripheralInput, PeripheralOutput},
@@ -101,6 +102,7 @@ use crate::{
     Blocking,
     InterruptConfigurable,
 };
+static REF_COUNTER: AtomicU8 = AtomicU8::new(0);
 
 /// Errors
 #[derive(Debug, Clone, Copy, PartialEq)]
@@ -230,7 +232,7 @@ where
         }
 
         PeripheralClockControl::reset(crate::system::Peripheral::Rmt);
-        PeripheralClockControl::enable(crate::system::Peripheral::Rmt);
+        PeripheralClockControl::enable(crate::system::Peripheral::Rmt, true);
 
         cfg_if::cfg_if! {
             if #[cfg(any(esp32, esp32s2))] {
@@ -325,6 +327,8 @@ fn configure_rx_channel<'d, P: PeripheralInput, T: RxChannelInternal<M>, M: crat
     T::set_filter_threshold(config.filter_threshold);
     T::set_idle_threshold(config.idle_threshold);
 
+    REF_COUNTER.fetch_add(1, Relaxed);
+
     Ok(T::new())
 }
 
@@ -345,6 +349,8 @@ fn configure_tx_channel<'d, P: PeripheralOutput, T: TxChannelInternal<M>, M: cra
     );
     T::set_idle_output(config.idle_output, config.idle_output_level);
 
+    REF_COUNTER.fetch_add(1, Relaxed);
+
     Ok(T::new())
 }
 
@@ -978,6 +984,15 @@ where
     phantom: PhantomData<M>,
 }
 
+impl<M: crate::Mode, const CHANNEL: u8> Drop for Channel<M, CHANNEL> {
+    fn drop(&mut self) {
+        REF_COUNTER.fetch_sub(1, Relaxed);
+        if REF_COUNTER.load(Relaxed) == 0 {
+            PeripheralClockControl::enable(crate::system::Peripheral::Rmt, false);
+        }
+    }
+}
+
 /// Channel in TX mode
 pub trait TxChannel: TxChannelInternal<Blocking> {
     /// Start transmitting the given pulse code sequence.