Remove mention of Espressif MCUs from xtensa-lx

esp-rs · Nov 4, 2024 · de95efa · de95efa
1 parent 33e46ef
commit de95efa
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Showing 3 changed files with 7 additions and 7 deletions.
diff --git a/esp-hal/Cargo.toml b/esp-hal/Cargo.toml
@@ -157,3 +157,6 @@ mixed_attributes_style = "allow"
 
 [lints.rust]
 unexpected_cfgs = { level = "warn", check-cfg = ['cfg(host_os, values("windows"))'] }
+
+[patch.crates-io]
+xtensa-lx = { path = "../xtensa-lx" }
diff --git a/esp-wifi/Cargo.toml b/esp-wifi/Cargo.toml
@@ -197,3 +197,6 @@ features = [
   "esp-hal/default",
 ]
 default-target = "riscv32imc-unknown-none-elf"
+
+[patch.crates-io]
+xtensa-lx = { path = "../xtensa-lx" }
diff --git a/xtensa-lx/README.md b/xtensa-lx/README.md
@@ -5,13 +5,7 @@
 ![Crates.io](https://img.shields.io/crates/l/xtensa-lx?labelColor=1C2C2E&style=flat-square)
 [![Matrix](https://img.shields.io/matrix/esp-rs:matrix.org?label=join%20matrix&labelColor=1C2C2E&color=BEC5C9&logo=matrix&style=flat-square)](https://matrix.to/#/#esp-rs:matrix.org)
 
-Low level access to Xtensa LX processors. This crate currently supports the following CPUs:
-
-| Feature   | Supported CPUs   |
-| --------- | ---------------- |
-| `esp32`   | ESP32 (_LX6_)    |
-| `esp32s2` | ESP32-S2 (_LX7_) |
-| `esp32s3` | ESP32-S3 (_LX7_) |
+Low level access to Xtensa LX processors.
 
 ## [Documentation](https://docs.rs/crate/xtensa-lx)