convert language Chinese to English

ch08/8.2/8.2.md

@@ -36,7 +36,7 @@ Generate code for the following three-address statements assuming all variables
         ADD R3, R3, R1
         ST y, R3
 
-Note：第 5 小题，可以在生成的汇编码第三行后插入 `ST x, R1` 和 `LD R1, x` 两句，这两句属于冗余代码（redundant store-load）。使用简易代码生成策略很容易生成这种冗余代码，慢是慢一些但是也是正确的，有专门处理这种问题的优化（redundant store-load elimination），所以生不生成在这题的答案里感觉都行。
+Note：5 small problem that can be inserted in the third row of the assembler code generation ST x, R1and LD R1, xtwo, which belong to two redundant code (redundant store-load). It is easy to generate such redundant code using a simple code generation strategy. Slower is slower but correct. There is a redundant store-load elimination, so the students don’t feel the answer in this question. All right.
 
 ### 8.2.2
 
@@ -127,7 +127,7 @@ Generate code for the following sequence assuming that x, y, and z are in memory
     L1: LD R1, #1
         ST z, R1
 
-Note：实际生成代码时会把标签对应到具体的数字地址上，但这小节还没到那一步，把原本题目里的标签名拿来随便写写就好啦。
+Note：When the code is actually generated, the label will be assigned to a specific numeric address, but this section has not yet reached that point. It is good to just write the label name in the original title.
 
 ### 8.2.5
 
@@ -172,8 +172,7 @@ Generate code for the following sequence assuming that n is in a memory location
         BR L1
     L2:
 
-Note：短版本的优化 1）消除冗余存-读 2）循环不变代码外提 3）然后外加寄存器分配
-
+Note：Short version of the optimization 1) eliminate redundant memory - read 2) loop invariant code outside 3) then add register allocation
 ### 8.2.6
 
 Determine the costs of the following instruction sequences:
@@ -215,33 +214,33 @@ Determine the costs of the following instruction sequences:
 5. 2 + 2 + 2 = 6
 6. 2 + 2 + 1 + 1 = 6
 
-Note：这本书用的指令集没明确定义所有指令的细节，但看起来所谓用变量名来指定内存地址实际上隐含着这些变量是静态分配的假设，也就是说在真正生成完的指令里这些变量名都会被替换为它们对应的数字形式的地址常量，而地址存在指令后的一个额外的word里，这就算多一单位的开销。
+Note： The instruction set used in this book does not explicitly define the details of all instructions, but it seems that the use of variable names to specify memory addresses actually implies the assumption that these variables are statically allocated, that is, in the actual generated instructions. These variable names are replaced with their corresponding numeric address constants, and the address exists in an extra word after the instruction, which is even more than one unit of overhead.
+
 
 ---
 
 ### Note
 
-1. 很明显本节内容写得非常随意，推荐数字常量是应该都加#前缀的，除了放在地址里用。比如 `LD R1, #1` 和 `ADD R1, R1, #1`。
+1. Obviously, this section is written very casually. The recommended numeric constants should be prefixed with #, except in the address. For example, LD R1, #1and ADD R1, R1, #1.
 
-2. 本书中 Ri 表示第 i 号寄存器。
+2. In this book, Ri stands for the ith register.
 
-    1. 在翻译成汇编码的过程中，是可以随意指定 i 的值（比如 R3, R4, R1000）呢还是会有某种限制？
+In the process of translating into assembly code, is it possible to arbitrarily specify the value of i (such as R3, R4, R1000) or is there a certain limit?
 
-        回答：现在暂时随意。等后面说寄存器个数有限制的时候再考虑有限制的情况。
+Answer: It is now free. When there are restrictions on the number of registers, consider the case of restrictions.
 
-    2. 另外，如果代码中所示的 R1 在后面的代码中用不着了，那么新的值是不是可以被加载到 R1 中？如果可以的话，如何知道之前的 R1 用不着了？
+3. Also, if the R1 shown in the code is not used in the code that follows, can the new value be loaded into R1? If you can, how do you know that the previous R1 is not needed?
 
-        回答：可以覆盖。至于如何知道前面的值死了就要看 def-use 链。这是优化的重要问题。例如9.2.5小节讲 live variable 就跟这个有关。
+Answer: Can be overwritten. As for how to know that the previous value is dead, you need to look at the def-use chain. This is an important issue for optimization. For example, the 9.2.5 section says live variable is related to this.
 
-3. b = a[i] 对应的汇编码：
+b = a[i] corresponding sink code:
 
     ```
     LD R1, i
     MUL R1, R1, 8
     LD R2, a(R1)
     ...
     ```
+Where a does it need to be loaded into the register first?
 
-    其中 a 为什么不需要先 load 到寄存器？
-
-    回答：这里隐含一个假设：变量是静态分配存储的。后面涉及不是静态变量的时候情况会有变化。
+Answer: There is a hypothesis here: variables are stored statically. The situation will change when it comes to non-static variables.