eth: Use unpacked arrays for multidimensional ports

Signed-off-by: Alex Forencich <[email protected]>
fpganinja · Mar 7, 2025 · ed9e8ff · ed9e8ff
1 parent 6e4988f
commit ed9e8ff
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Showing 40 changed files with 408 additions and 440 deletions.
diff --git a/example/ADM_PCIE_9V3/fpga/rtl/fpga_core.sv b/example/ADM_PCIE_9V3/fpga/rtl/fpga_core.sv
@@ -205,12 +205,11 @@ for (genvar n = 0; n < 2; n = n + 1) begin : gty_quad
         /*
          * PTP clock
          */
-        .tx_ptp_ts('0),
+        .tx_ptp_ts('{CNT{'0}}),
         .tx_ptp_ts_step('0),
-        .rx_ptp_ts('0),
+        .rx_ptp_ts('{CNT{'0}}),
         .rx_ptp_ts_step('0),
 
-
         /*
          * Link-level Flow Control (LFC) (IEEE 802.3 annex 31B PAUSE)
          */
@@ -223,11 +222,11 @@ for (genvar n = 0; n < 2; n = n + 1) begin : gty_quad
         /*
          * Priority Flow Control (PFC) (IEEE 802.3 annex 31D PFC)
          */
-        .tx_pfc_req('0),
+        .tx_pfc_req('{CNT{'0}}),
         .tx_pfc_resend('0),
-        .rx_pfc_en('0),
+        .rx_pfc_en('{CNT{'0}}),
         .rx_pfc_req(),
-        .rx_pfc_ack('0),
+        .rx_pfc_ack('{CNT{'0}}),
 
         /*
          * Pause interface

diff --git a/example/Alveo/fpga/rtl/fpga_core.sv b/example/Alveo/fpga/rtl/fpga_core.sv
@@ -255,12 +255,11 @@ for (genvar n = 0; n < GTY_QUAD_CNT; n = n + 1) begin : gty_quad
         /*
          * PTP clock
          */
-        .tx_ptp_ts('0),
+        .tx_ptp_ts('{CNT{'0}}),
         .tx_ptp_ts_step('0),
-        .rx_ptp_ts('0),
+        .rx_ptp_ts('{CNT{'0}}),
         .rx_ptp_ts_step('0),
 
-
         /*
          * Link-level Flow Control (LFC) (IEEE 802.3 annex 31B PAUSE)
          */
@@ -273,11 +272,11 @@ for (genvar n = 0; n < GTY_QUAD_CNT; n = n + 1) begin : gty_quad
         /*
          * Priority Flow Control (PFC) (IEEE 802.3 annex 31D PFC)
          */
-        .tx_pfc_req('0),
+        .tx_pfc_req('{CNT{'0}}),
         .tx_pfc_resend('0),
-        .rx_pfc_en('0),
+        .rx_pfc_en('{CNT{'0}}),
         .rx_pfc_req(),
-        .rx_pfc_ack('0),
+        .rx_pfc_ack('{CNT{'0}}),
 
         /*
          * Pause interface

diff --git a/example/KCU105/fpga/rtl/fpga_core.sv b/example/KCU105/fpga/rtl/fpga_core.sv
@@ -484,12 +484,11 @@ end else begin : sfp_mac
         /*
          * PTP clock
          */
-        .tx_ptp_ts('0),
+        .tx_ptp_ts('{2{'0}}),
         .tx_ptp_ts_step('0),
-        .rx_ptp_ts('0),
+        .rx_ptp_ts('{2{'0}}),
         .rx_ptp_ts_step('0),
 
-
         /*
          * Link-level Flow Control (LFC) (IEEE 802.3 annex 31B PAUSE)
          */
@@ -502,11 +501,11 @@ end else begin : sfp_mac
         /*
          * Priority Flow Control (PFC) (IEEE 802.3 annex 31D PFC)
          */
-        .tx_pfc_req('0),
+        .tx_pfc_req('{2{'0}}),
         .tx_pfc_resend('0),
-        .rx_pfc_en('0),
+        .rx_pfc_en('{2{'0}}),
         .rx_pfc_req(),
-        .rx_pfc_ack('0),
+        .rx_pfc_ack('{2{'0}}),
 
         /*
          * Pause interface

diff --git a/example/KR260/fpga/rtl/fpga_core.sv b/example/KR260/fpga/rtl/fpga_core.sv
@@ -429,12 +429,11 @@ end else begin : sfp_mac
         /*
          * PTP clock
          */
-        .tx_ptp_ts('0),
+        .tx_ptp_ts('{1{'0}}),
         .tx_ptp_ts_step('0),
-        .rx_ptp_ts('0),
+        .rx_ptp_ts('{1{'0}}),
         .rx_ptp_ts_step('0),
 
-
         /*
          * Link-level Flow Control (LFC) (IEEE 802.3 annex 31B PAUSE)
          */
@@ -447,11 +446,11 @@ end else begin : sfp_mac
         /*
          * Priority Flow Control (PFC) (IEEE 802.3 annex 31D PFC)
          */
-        .tx_pfc_req('0),
+        .tx_pfc_req('{1{'0}}),
         .tx_pfc_resend('0),
-        .rx_pfc_en('0),
+        .rx_pfc_en('{1{'0}}),
         .rx_pfc_req(),
-        .rx_pfc_ack('0),
+        .rx_pfc_ack('{1{'0}}),
 
         /*
          * Pause interface

diff --git a/example/Nexus_K3P_Q/fpga/rtl/fpga_core.sv b/example/Nexus_K3P_Q/fpga/rtl/fpga_core.sv
@@ -224,12 +224,11 @@ for (genvar n = 0; n < 2; n = n + 1) begin : gty_quad
         /*
          * PTP clock
          */
-        .tx_ptp_ts('0),
+        .tx_ptp_ts('{CNT{'0}}),
         .tx_ptp_ts_step('0),
-        .rx_ptp_ts('0),
+        .rx_ptp_ts('{CNT{'0}}),
         .rx_ptp_ts_step('0),
 
-
         /*
          * Link-level Flow Control (LFC) (IEEE 802.3 annex 31B PAUSE)
          */
@@ -242,11 +241,11 @@ for (genvar n = 0; n < 2; n = n + 1) begin : gty_quad
         /*
          * Priority Flow Control (PFC) (IEEE 802.3 annex 31D PFC)
          */
-        .tx_pfc_req('0),
+        .tx_pfc_req('{CNT{'0}}),
         .tx_pfc_resend('0),
-        .rx_pfc_en('0),
+        .rx_pfc_en('{CNT{'0}}),
         .rx_pfc_req(),
-        .rx_pfc_ack('0),
+        .rx_pfc_ack('{CNT{'0}}),
 
         /*
          * Pause interface

diff --git a/example/Nexus_K3P_S/fpga/rtl/fpga_core.sv b/example/Nexus_K3P_S/fpga/rtl/fpga_core.sv
@@ -205,12 +205,11 @@ sfp_mac_inst (
     /*
      * PTP clock
      */
-    .tx_ptp_ts('0),
+    .tx_ptp_ts('{2{'0}}),
     .tx_ptp_ts_step('0),
-    .rx_ptp_ts('0),
+    .rx_ptp_ts('{2{'0}}),
     .rx_ptp_ts_step('0),
 
-
     /*
      * Link-level Flow Control (LFC) (IEEE 802.3 annex 31B PAUSE)
      */
@@ -223,11 +222,11 @@ sfp_mac_inst (
     /*
      * Priority Flow Control (PFC) (IEEE 802.3 annex 31D PFC)
      */
-    .tx_pfc_req('0),
+    .tx_pfc_req('{2{'0}}),
     .tx_pfc_resend('0),
-    .rx_pfc_en('0),
+    .rx_pfc_en('{2{'0}}),
     .rx_pfc_req(),
-    .rx_pfc_ack('0),
+    .rx_pfc_ack('{2{'0}}),
 
     /*
      * Pause interface

diff --git a/example/VCU108/fpga/rtl/fpga_core.sv b/example/VCU108/fpga/rtl/fpga_core.sv
@@ -328,12 +328,11 @@ qsfp_mac_inst (
     /*
      * PTP clock
      */
-    .tx_ptp_ts('0),
+    .tx_ptp_ts('{4{'0}}),
     .tx_ptp_ts_step('0),
-    .rx_ptp_ts('0),
+    .rx_ptp_ts('{4{'0}}),
     .rx_ptp_ts_step('0),
 
-
     /*
      * Link-level Flow Control (LFC) (IEEE 802.3 annex 31B PAUSE)
      */
@@ -346,11 +345,11 @@ qsfp_mac_inst (
     /*
      * Priority Flow Control (PFC) (IEEE 802.3 annex 31D PFC)
      */
-    .tx_pfc_req('0),
+    .tx_pfc_req('{4{'0}}),
     .tx_pfc_resend('0),
-    .rx_pfc_en('0),
+    .rx_pfc_en('{4{'0}}),
     .rx_pfc_req(),
-    .rx_pfc_ack('0),
+    .rx_pfc_ack('{4{'0}}),
 
     /*
      * Pause interface

diff --git a/example/VCU118/fpga/rtl/fpga_core.sv b/example/VCU118/fpga/rtl/fpga_core.sv
@@ -523,12 +523,11 @@ for (genvar n = 0; n < 2; n = n + 1) begin : gty_quad
         /*
          * PTP clock
          */
-        .tx_ptp_ts('0),
+        .tx_ptp_ts('{CNT{'0}}),
         .tx_ptp_ts_step('0),
-        .rx_ptp_ts('0),
+        .rx_ptp_ts('{CNT{'0}}),
         .rx_ptp_ts_step('0),
 
-
         /*
          * Link-level Flow Control (LFC) (IEEE 802.3 annex 31B PAUSE)
          */
@@ -541,11 +540,11 @@ for (genvar n = 0; n < 2; n = n + 1) begin : gty_quad
         /*
          * Priority Flow Control (PFC) (IEEE 802.3 annex 31D PFC)
          */
-        .tx_pfc_req('0),
+        .tx_pfc_req('{CNT{'0}}),
         .tx_pfc_resend('0),
-        .rx_pfc_en('0),
+        .rx_pfc_en('{CNT{'0}}),
         .rx_pfc_req(),
-        .rx_pfc_ack('0),
+        .rx_pfc_ack('{CNT{'0}}),
 
         /*
          * Pause interface

diff --git a/example/ZCU102/fpga/rtl/fpga_core.sv b/example/ZCU102/fpga/rtl/fpga_core.sv
@@ -555,12 +555,11 @@ end else begin : sfp_mac
         /*
          * PTP clock
          */
-        .tx_ptp_ts('0),
+        .tx_ptp_ts('{4{'0}}),
         .tx_ptp_ts_step('0),
-        .rx_ptp_ts('0),
+        .rx_ptp_ts('{4{'0}}),
         .rx_ptp_ts_step('0),
 
-
         /*
          * Link-level Flow Control (LFC) (IEEE 802.3 annex 31B PAUSE)
          */
@@ -573,11 +572,11 @@ end else begin : sfp_mac
         /*
          * Priority Flow Control (PFC) (IEEE 802.3 annex 31D PFC)
          */
-        .tx_pfc_req('0),
+        .tx_pfc_req('{4{'0}}),
         .tx_pfc_resend('0),
-        .rx_pfc_en('0),
+        .rx_pfc_en('{4{'0}}),
         .rx_pfc_req(),
-        .rx_pfc_ack('0),
+        .rx_pfc_ack('{4{'0}}),
 
         /*
          * Pause interface

diff --git a/example/ZCU106/fpga/rtl/fpga_core.sv b/example/ZCU106/fpga/rtl/fpga_core.sv
@@ -397,12 +397,11 @@ end else begin : sfp_mac
         /*
          * PTP clock
          */
-        .tx_ptp_ts('0),
+        .tx_ptp_ts('{2{'0}}),
         .tx_ptp_ts_step('0),
-        .rx_ptp_ts('0),
+        .rx_ptp_ts('{2{'0}}),
         .rx_ptp_ts_step('0),
 
-
         /*
          * Link-level Flow Control (LFC) (IEEE 802.3 annex 31B PAUSE)
          */
@@ -415,11 +414,11 @@ end else begin : sfp_mac
         /*
          * Priority Flow Control (PFC) (IEEE 802.3 annex 31D PFC)
          */
-        .tx_pfc_req('0),
+        .tx_pfc_req('{2{'0}}),
         .tx_pfc_resend('0),
-        .rx_pfc_en('0),
+        .rx_pfc_en('{2{'0}}),
         .rx_pfc_req(),
-        .rx_pfc_ack('0),
+        .rx_pfc_ack('{2{'0}}),
 
         /*
          * Pause interface

diff --git a/example/ZCU111/fpga/rtl/fpga_core.sv b/example/ZCU111/fpga/rtl/fpga_core.sv
@@ -233,12 +233,11 @@ sfp_mac_inst (
     /*
      * PTP clock
      */
-    .tx_ptp_ts('0),
+    .tx_ptp_ts('{4{'0}}),
     .tx_ptp_ts_step('0),
-    .rx_ptp_ts('0),
+    .rx_ptp_ts('{4{'0}}),
     .rx_ptp_ts_step('0),
 
-
     /*
      * Link-level Flow Control (LFC) (IEEE 802.3 annex 31B PAUSE)
      */
@@ -251,11 +250,11 @@ sfp_mac_inst (
     /*
      * Priority Flow Control (PFC) (IEEE 802.3 annex 31D PFC)
      */
-    .tx_pfc_req('0),
+    .tx_pfc_req('{4{'0}}),
     .tx_pfc_resend('0),
-    .rx_pfc_en('0),
+    .rx_pfc_en('{4{'0}}),
     .rx_pfc_req(),
-    .rx_pfc_ack('0),
+    .rx_pfc_ack('{4{'0}}),
 
     /*
      * Pause interface

diff --git a/example/fb2CG/fpga/rtl/fpga_core.sv b/example/fb2CG/fpga/rtl/fpga_core.sv
@@ -245,12 +245,11 @@ for (genvar n = 0; n < 2; n = n + 1) begin : gty_quad
         /*
          * PTP clock
          */
-        .tx_ptp_ts('0),
+        .tx_ptp_ts('{CNT{'0}}),
         .tx_ptp_ts_step('0),
-        .rx_ptp_ts('0),
+        .rx_ptp_ts('{CNT{'0}}),
         .rx_ptp_ts_step('0),
 
-
         /*
          * Link-level Flow Control (LFC) (IEEE 802.3 annex 31B PAUSE)
          */
@@ -263,11 +262,11 @@ for (genvar n = 0; n < 2; n = n + 1) begin : gty_quad
         /*
          * Priority Flow Control (PFC) (IEEE 802.3 annex 31D PFC)
          */
-        .tx_pfc_req('0),
+        .tx_pfc_req('{CNT{'0}}),
         .tx_pfc_resend('0),
-        .rx_pfc_en('0),
+        .rx_pfc_en('{CNT{'0}}),
         .rx_pfc_req(),
-        .rx_pfc_ack('0),
+        .rx_pfc_ack('{CNT{'0}}),
 
         /*
          * Pause interface

diff --git a/rtl/eth/taxi_eth_mac_10g.sv b/rtl/eth/taxi_eth_mac_10g.sv
@@ -142,8 +142,8 @@ module taxi_eth_mac_10g #
     input  wire logic [15:0]          cfg_tx_pfc_eth_type = 16'h8808,
     input  wire logic [15:0]          cfg_tx_pfc_opcode = 16'h0101,
     input  wire logic                 cfg_tx_pfc_en = 1'b0,
-    input  wire logic [7:0][15:0]     cfg_tx_pfc_quanta = '{8{16'hffff}},
-    input  wire logic [7:0][15:0]     cfg_tx_pfc_refresh = '{8{16'h7fff}},
+    input  wire logic [15:0]          cfg_tx_pfc_quanta[8] = '{8{16'hffff}},
+    input  wire logic [15:0]          cfg_tx_pfc_refresh[8] = '{8{16'h7fff}},
     input  wire logic [15:0]          cfg_rx_lfc_opcode = 16'h0001,
     input  wire logic                 cfg_rx_lfc_en = 1'b0,
     input  wire logic [15:0]          cfg_rx_pfc_opcode = 16'h0101,