Correct optimisation of OD/US/DS code when clock == 0|1.

grame-cncm · Feb 25, 2025 · cda9f57 · cda9f57
1 parent e009f6c
commit cda9f57
Showing 1 changed file with 56 additions and 2 deletions.
diff --git a/compiler/propagate/propagate.cpp b/compiler/propagate/propagate.cpp
@@ -631,10 +631,10 @@ static siglist realPropagate(Tree clockenv, Tree slotenv, Tree path, Tree box, c
 
         if (double f; isSigReal(H, &f)) {
             h0 = int(f) == 0;
-            h1 = int(f) != 0;
+            h1 = int(f) == 1;
         } else if (int n; isSigInt(H, &n)) {
             h0 = n == 0;
-            h1 = n != 0;
+            h1 = n == 1;
         }
 
         // 2/ We check for trivial cases where we don't need the ondemand circuit
@@ -708,6 +708,33 @@ static siglist realPropagate(Tree clockenv, Tree slotenv, Tree path, Tree box, c
 
         // 1/ The first signal is the clock signal
         Tree H = lsig[0];
+
+        // We check if the clock signal is a constant
+        bool h0 = false;  // clock signal is zero constant
+        bool h1 = false;  // clock signal is non-zero constant
+
+        if (double f; isSigReal(H, &f)) {
+            h0 = int(f) == 0;
+            h1 = int(f) == 1;
+        } else if (int n; isSigInt(H, &n)) {
+            h0 = n == 0;
+            h1 = n == 1;
+        }
+
+        // 2/ We check for trivial cases where we don't need the upsampling circuit
+        if (h0) {
+            // std::cerr
+            //     << "If the clock signal is zero, we don't need to compute the upsampling circuit"
+            //     << std::endl;
+            int n, m;
+            getBoxType(t1, &n, &m);
+            // because the cicuit is never activated, its m outputs will remain zero
+            return siglist(m, sigInt(0));
+        }
+        if (h1) {
+            // std::cerr << "If the clock signal is one, we don't need an if" << std::endl;
+            return propagate(clockenv, slotenv, path, t1, {lsig.begin() + 1, lsig.end()});
+        }
 
         /*
         int up_factor;
@@ -777,7 +804,34 @@ static siglist realPropagate(Tree clockenv, Tree slotenv, Tree path, Tree box, c
 
         // 1/ The first signal is the clock signal
         Tree H = lsig[0];
+
+        // We check if the clock signal is a constant
+        bool h0 = false;  // clock signal is zero constant
+        bool h1 = false;  // clock signal is non-zero constant
 
+        if (double f; isSigReal(H, &f)) {
+            h0 = int(f) == 0;
+            h1 = int(f) == 1;
+        } else if (int n; isSigInt(H, &n)) {
+            h0 = n == 0;
+            h1 = n == 1;
+        }
+
+        // 2/ We check for trivial cases where we don't need the downsampling circuit
+        if (h0) {
+            // std::cerr
+            //     << "If the clock signal is zero, we don't need to compute the downsampling circuit"
+            //     << std::endl;
+            int n, m;
+            getBoxType(t1, &n, &m);
+            // because the cicuit is never activated, its m outputs will remain zero
+            return siglist(m, sigInt(0));
+        }
+        if (h1) {
+            // std::cerr << "If the clock signal is one, we don't need an if" << std::endl;
+            return propagate(clockenv, slotenv, path, t1, {lsig.begin() + 1, lsig.end()});
+        }
+
         /*
         int ds_factor;
         if (isSigInt(H, &ds_factor)) {