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Revert "Trim some redundant Arm feature detection files"
This reverts commit d36bf85.
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/* Copyright (c) 2022, Google Inc. | ||
* | ||
* Permission to use, copy, modify, and/or distribute this software for any | ||
* purpose with or without fee is hereby granted, provided that the above | ||
* copyright notice and this permission notice appear in all copies. | ||
* | ||
* THE SOFTWARE IS PROVIDED "AS IS" AND THE AUTHOR DISCLAIMS ALL WARRANTIES | ||
* WITH REGARD TO THIS SOFTWARE INCLUDING ALL IMPLIED WARRANTIES OF | ||
* MERCHANTABILITY AND FITNESS. IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY | ||
* SPECIAL, DIRECT, INDIRECT, OR CONSEQUENTIAL DAMAGES OR ANY DAMAGES | ||
* WHATSOEVER RESULTING FROM LOSS OF USE, DATA OR PROFITS, WHETHER IN AN ACTION | ||
* OF CONTRACT, NEGLIGENCE OR OTHER TORTIOUS ACTION, ARISING OUT OF OR IN | ||
* CONNECTION WITH THE USE OR PERFORMANCE OF THIS SOFTWARE. */ | ||
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#include "internal.h" | ||
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#if defined(OPENSSL_AARCH64) && defined(OPENSSL_FREEBSD) && \ | ||
!defined(OPENSSL_STATIC_ARMCAP) | ||
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#include <machine/armreg.h> | ||
#include <sys/types.h> | ||
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#include <openssl/arm_arch.h> | ||
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// ID_AA64ISAR0_*_VAL are defined starting FreeBSD 13.0. When FreeBSD | ||
// 12.x is out of support, these compatibility macros can be removed. | ||
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#ifndef ID_AA64ISAR0_AES_VAL | ||
#define ID_AA64ISAR0_AES_VAL ID_AA64ISAR0_AES | ||
#endif | ||
#ifndef ID_AA64ISAR0_SHA1_VAL | ||
#define ID_AA64ISAR0_SHA1_VAL ID_AA64ISAR0_SHA1 | ||
#endif | ||
#ifndef ID_AA64ISAR0_SHA2_VAL | ||
#define ID_AA64ISAR0_SHA2_VAL ID_AA64ISAR0_SHA2 | ||
#endif | ||
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void OPENSSL_cpuid_setup(void) { | ||
uint64_t id_aa64isar0 = READ_SPECIALREG(id_aa64isar0_el1); | ||
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OPENSSL_armcap_P |= ARMV7_NEON; | ||
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if (ID_AA64ISAR0_AES_VAL(id_aa64isar0) >= ID_AA64ISAR0_AES_BASE) { | ||
OPENSSL_armcap_P |= ARMV8_AES; | ||
} | ||
if (ID_AA64ISAR0_AES_VAL(id_aa64isar0) >= ID_AA64ISAR0_AES_PMULL) { | ||
OPENSSL_armcap_P |= ARMV8_PMULL; | ||
} | ||
if (ID_AA64ISAR0_SHA1_VAL(id_aa64isar0) >= ID_AA64ISAR0_SHA1_BASE) { | ||
OPENSSL_armcap_P |= ARMV8_SHA1; | ||
} | ||
if (ID_AA64ISAR0_SHA2_VAL(id_aa64isar0) >= ID_AA64ISAR0_SHA2_BASE) { | ||
OPENSSL_armcap_P |= ARMV8_SHA256; | ||
} | ||
if (ID_AA64ISAR0_SHA2_VAL(id_aa64isar0) >= ID_AA64ISAR0_SHA2_512) { | ||
OPENSSL_armcap_P |= ARMV8_SHA512; | ||
} | ||
} | ||
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#endif // OPENSSL_AARCH64 && OPENSSL_FREEBSD && !OPENSSL_STATIC_ARMCAP |
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/* Copyright (c) 2022, Robert Nagy <[email protected]> | ||
* | ||
* Permission to use, copy, modify, and/or distribute this software for any | ||
* purpose with or without fee is hereby granted, provided that the above | ||
* copyright notice and this permission notice appear in all copies. | ||
* | ||
* THE SOFTWARE IS PROVIDED "AS IS" AND THE AUTHOR DISCLAIMS ALL WARRANTIES | ||
* WITH REGARD TO THIS SOFTWARE INCLUDING ALL IMPLIED WARRANTIES OF | ||
* MERCHANTABILITY AND FITNESS. IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY | ||
* SPECIAL, DIRECT, INDIRECT, OR CONSEQUENTIAL DAMAGES OR ANY DAMAGES | ||
* WHATSOEVER RESULTING FROM LOSS OF USE, DATA OR PROFITS, WHETHER IN AN ACTION | ||
* OF CONTRACT, NEGLIGENCE OR OTHER TORTIOUS ACTION, ARISING OUT OF OR IN | ||
* CONNECTION WITH THE USE OR PERFORMANCE OF THIS SOFTWARE. */ | ||
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#include <openssl/cpu.h> | ||
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#if defined(OPENSSL_AARCH64) && defined(OPENSSL_OPENBSD) && \ | ||
!defined(OPENSSL_STATIC_ARMCAP) | ||
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#include <sys/sysctl.h> | ||
#include <machine/cpu.h> | ||
#include <machine/armreg.h> | ||
#include <stdio.h> | ||
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#include <openssl/arm_arch.h> | ||
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#include "internal.h" | ||
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void OPENSSL_cpuid_setup(void) { | ||
// CTL_MACHDEP from sys/sysctl.h | ||
// CPU_ID_AA64ISAR0 from machine/cpu.h | ||
int isar0_mib[] = { CTL_MACHDEP, CPU_ID_AA64ISAR0 }; | ||
size_t len = sizeof(uint64_t); | ||
uint64_t cpu_id = 0; | ||
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if (sysctl(isar0_mib, 2, &cpu_id, &len, NULL, 0) < 0) | ||
return; | ||
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OPENSSL_armcap_P |= ARMV7_NEON; | ||
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if (ID_AA64ISAR0_AES(cpu_id) >= ID_AA64ISAR0_AES_BASE) | ||
OPENSSL_armcap_P |= ARMV8_AES; | ||
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if (ID_AA64ISAR0_AES(cpu_id) >= ID_AA64ISAR0_AES_PMULL) | ||
OPENSSL_armcap_P |= ARMV8_PMULL; | ||
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if (ID_AA64ISAR0_SHA1(cpu_id) >= ID_AA64ISAR0_SHA1_BASE) | ||
OPENSSL_armcap_P |= ARMV8_SHA1; | ||
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if (ID_AA64ISAR0_SHA2(cpu_id) >= ID_AA64ISAR0_SHA2_BASE) | ||
OPENSSL_armcap_P |= ARMV8_SHA256; | ||
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if (ID_AA64ISAR0_SHA2(cpu_id) >= ID_AA64ISAR0_SHA2_512) | ||
OPENSSL_armcap_P |= ARMV8_SHA512; | ||
} | ||
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#endif // OPENSSL_AARCH64 && OPENSSL_OPENBSD && !OPENSSL_STATIC_ARMCAP |
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