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Corrected timer seed
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Prevoius one caused the clock being slow.
If timer is se to "2", the diagram looks like this:
value:      __|_____|_____|_____|__
              0     1     2     3
interrupt:  __+-+_________+-+______

3 intervals are between interrupts. So interrupts happen
(OCR1A+1) more rare than clock cicles.
Frequency is  (OCR1A+1) times lower than quarz clocking
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k-popov committed Dec 14, 2012
1 parent 95fd038 commit 9e4b0bd
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Showing 2 changed files with 2 additions and 2 deletions.
2 changes: 1 addition & 1 deletion arduino_clock.ino
Original file line number Diff line number Diff line change
Expand Up @@ -2,7 +2,7 @@
#include <SerialLCD.h>
#include <SoftwareSerial.h> //this is a must

#define TIMER_SEED 15633
#define TIMER_SEED 15632

SerialLCD slcd(11, 12); //this is a must, assign soft serial pins
byte seconds = 0;
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2 changes: 1 addition & 1 deletion clock_scale.py
Original file line number Diff line number Diff line change
Expand Up @@ -42,7 +42,7 @@ def better_result(cur_skew,

for conter_seed in xrange(1,timer_max_value):
for p in prescalers:
postscaler = freq / p / (conter_seed)
postscaler = freq / p / (conter_seed + 1)
if postscaler > max_postscaler: continue
skew = postscaler - int(postscaler)
if better_result(skew,
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