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Felix S. Klock II edited this page Jul 28, 2013
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These are peephole optimizations where we take an MsiSequence like "op1 null?; branchf L100" (which first puts #t in result if result holds the null value, and #f otherwise, and then branches to label L100 if result holds #f) and replaces it with the instruction "op1/branchf null?,L100", which branches to label L100 if result holds anything but the null value.
The key here is that we avoid computing the boolean value and storing it in a register; instead we can let the processor's internal flags represent the boolean result of inspecting the register.