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[reggen] Describe REGWEN properly for multi-registers #3614

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[reggen] Describe REGWEN properly for multi-registers

[reggen] Describe REGWEN properly for multi-registers #3614

Triggered via pull request December 18, 2024 16:37
@rswarbrickrswarbrick
opened #25699
rswarbrick:reggen-multireg-regwen
Status Failure
Total duration 2h 40m 25s
Artifacts 17

ci.yml

on: pull_request
Lint (quick)
3m 28s
Lint (quick)
Earl Grey for CW310 Hyperdebug  /  Build bitstream
1h 12m
Earl Grey for CW310 Hyperdebug / Build bitstream
Earl Grey for CW310  /  Build bitstream
1h 10m
Earl Grey for CW310 / Build bitstream
Earl Grey for CW340  /  Build bitstream
29m 32s
Earl Grey for CW340 / Build bitstream
Lint (slow)
11m 18s
Lint (slow)
Build documentation
5m 5s
Build documentation
Airgapped build
11m 33s
Airgapped build
Verible lint
59s
Verible lint
Run OTBN smoke Test
2m 35s
Run OTBN smoke Test
Run OTBN crypto tests
20m 56s
Run OTBN crypto tests
Verilated English Breakfast
7m 46s
Verilated English Breakfast
Verilated Earl Grey
1h 21m
Verilated Earl Grey
CW305's Bitstream
15m 59s
CW305's Bitstream
Build Docker Containers
2m 58s
Build Docker Containers
Build and test software
13m 48s
Build and test software
CW310 SiVal Tests  /  FPGA test
24m 42s
CW310 SiVal Tests / FPGA test
CW310 SiVal ROM_EXT Tests  /  FPGA test
38m 5s
CW310 SiVal ROM_EXT Tests / FPGA test
CW310 Manufacturing Tests  /  FPGA test
27m 21s
CW310 Manufacturing Tests / FPGA test
CW310 Test ROM Tests  /  FPGA test
3m 56s
CW310 Test ROM Tests / FPGA test
CW310 ROM Tests  /  FPGA test
40m 39s
CW310 ROM Tests / FPGA test
CW310 ROM_EXT Tests  /  FPGA test
6m 12s
CW310 ROM_EXT Tests / FPGA test
CW340 Manufacturing Tests  /  FPGA test
CW340 Manufacturing Tests / FPGA test
CW340 ROM Tests  /  FPGA test
CW340 ROM Tests / FPGA test
CW340 ROM_EXT Tests  /  FPGA test
CW340 ROM_EXT Tests / FPGA test
CW340 SiVal ROM_EXT Tests  /  FPGA test
CW340 SiVal ROM_EXT Tests / FPGA test
CW340 SiVal Tests  /  FPGA test
CW340 SiVal Tests / FPGA test
CW340 Test ROM Tests  /  FPGA test
CW340 Test ROM Tests / FPGA test
Cache bitstreams to GCP
0s
Cache bitstreams to GCP
Verify FPGA jobs
23s
Verify FPGA jobs
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11 errors
Lint (slow)
Countermeasure check failed.
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Process completed with exit code 1.
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Some target names have banned characters.
Lint (slow)
Process completed with exit code 1.
Lint (slow)
Process completed with exit code 1.
Lint (slow)
Countermeasure check failed.
Lint (slow)
Process completed with exit code 1.
Build and test software
Process completed with exit code 1.
CW305's Bitstream
Process completed with exit code 1.
Earl Grey for CW340 / Build bitstream
The self-hosted runner: ubuntu-22.04-bitstream-xwwmk-runner-72qhl lost communication with the server. Verify the machine is running and has a healthy network connection. Anything in your workflow that terminates the runner process, starves it for CPU/Memory, or blocks its network access can cause this error.
Verify FPGA jobs
Process completed with exit code 1.

Artifacts

Produced during runtime
Name Size
execute_manuf_fpga_tests_cw310-targets
623 Bytes
execute_manuf_fpga_tests_cw310-test-results
59 KB
execute_rom_ext_fpga_tests_cw310-targets
379 Bytes
execute_rom_ext_fpga_tests_cw310-test-results
4.84 KB
execute_rom_fpga_tests_cw310-targets
1.75 KB
execute_rom_fpga_tests_cw310-test-results
46.3 KB
execute_sival_fpga_tests_cw310-targets
784 Bytes
execute_sival_fpga_tests_cw310-test-results
36.4 KB
execute_sival_rom_ext_fpga_tests_cw310-targets
2.21 KB
execute_sival_rom_ext_fpga_tests_cw310-test-results
181 KB
execute_test_rom_fpga_tests_cw310-targets
312 Bytes
execute_test_rom_fpga_tests_cw310-test-results
2.9 KB
partial-build-bin-chip_earlgrey_cw310
6.02 MB
partial-build-bin-chip_earlgrey_cw310_hyperdebug
6.05 MB
sw_build_test-test-results
60.4 KB
verilated_englishbreakfast
6.54 MB
verilator_earlgrey-test-results
8.84 KB