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[SiVal, manuf] Fix bazel target in testplan #3801

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[SiVal, manuf] Fix bazel target in testplan

[SiVal, manuf] Fix bazel target in testplan #3801

Triggered via pull request December 23, 2024 13:17
@engdoreisengdoreis
opened #25741
engdoreis:sival_fixes
Status Failure
Total duration 2h 1m 3s
Artifacts 30

ci.yml

on: pull_request
Lint (quick)
2m 59s
Lint (quick)
Earl Grey for CW310  /  Build bitstream
1m 52s
Earl Grey for CW310 / Build bitstream
Earl Grey for CW310 Hyperdebug  /  Build bitstream
1m 57s
Earl Grey for CW310 Hyperdebug / Build bitstream
Earl Grey for CW340  /  Build bitstream
1m 47s
Earl Grey for CW340 / Build bitstream
Lint (slow)
11m 34s
Lint (slow)
Build documentation
5m 2s
Build documentation
Airgapped build
7m 47s
Airgapped build
Verible lint
1m 10s
Verible lint
Run OTBN smoke Test
2m 31s
Run OTBN smoke Test
Run OTBN crypto tests
23m 9s
Run OTBN crypto tests
Verilated English Breakfast
8m 13s
Verilated English Breakfast
Verilated Earl Grey
1h 30m
Verilated Earl Grey
CW305's Bitstream
16m 49s
CW305's Bitstream
Build Docker Containers
2m 40s
Build Docker Containers
Build and test software
15m 25s
Build and test software
CW310 Test ROM Tests  /  FPGA test
4m 27s
CW310 Test ROM Tests / FPGA test
CW310 ROM Tests  /  FPGA test
45m 26s
CW310 ROM Tests / FPGA test
CW310 ROM_EXT Tests  /  FPGA test
8m 2s
CW310 ROM_EXT Tests / FPGA test
CW310 SiVal Tests  /  FPGA test
27m 26s
CW310 SiVal Tests / FPGA test
CW310 SiVal ROM_EXT Tests  /  FPGA test
36m 55s
CW310 SiVal ROM_EXT Tests / FPGA test
CW310 Manufacturing Tests  /  FPGA test
30m 30s
CW310 Manufacturing Tests / FPGA test
CW340 Test ROM Tests  /  FPGA test
3m 10s
CW340 Test ROM Tests / FPGA test
CW340 ROM Tests  /  FPGA test
44s
CW340 ROM Tests / FPGA test
CW340 ROM_EXT Tests  /  FPGA test
6m 49s
CW340 ROM_EXT Tests / FPGA test
CW340 SiVal Tests  /  FPGA test
17m 26s
CW340 SiVal Tests / FPGA test
CW340 SiVal ROM_EXT Tests  /  FPGA test
3m 58s
CW340 SiVal ROM_EXT Tests / FPGA test
CW340 Manufacturing Tests  /  FPGA test
42m 36s
CW340 Manufacturing Tests / FPGA test
Cache bitstreams to GCP
0s
Cache bitstreams to GCP
Verify FPGA jobs
32s
Verify FPGA jobs
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Annotations

11 errors
Lint (slow)
Countermeasure check failed.
Lint (slow)
Process completed with exit code 1.
Lint (slow)
Some target names have banned characters.
Lint (slow)
Process completed with exit code 1.
Lint (slow)
Process completed with exit code 1.
Lint (slow)
Countermeasure check failed.
Lint (slow)
Process completed with exit code 1.
Build and test software
Process completed with exit code 1.
CW305's Bitstream
Process completed with exit code 1.
bash.sw/device/silicon_creator/rom/e2e/bootstrap/e2e_bootstrap_rma_fpga_cw310_rom_with_fake_keys.bash: bash#L1
exited with error code 101
CW310 ROM Tests / FPGA test
Process completed with exit code 3.

Artifacts

Produced during runtime
Name Size
execute_manuf_fpga_tests_cw310-targets
623 Bytes
execute_manuf_fpga_tests_cw310-test-results
57.8 KB
execute_manuf_fpga_tests_cw340-targets
594 Bytes
execute_manuf_fpga_tests_cw340-test-results
56.4 KB
execute_rom_ext_fpga_tests_cw310-targets
519 Bytes
execute_rom_ext_fpga_tests_cw310-test-results
13.1 KB
execute_rom_ext_fpga_tests_cw340-targets
437 Bytes
execute_rom_ext_fpga_tests_cw340-test-results
7.26 KB
execute_rom_fpga_tests_cw310-targets
1.75 KB
execute_rom_fpga_tests_cw310-test-results
46.8 KB
execute_rom_fpga_tests_cw340-targets
162 Bytes
execute_rom_fpga_tests_cw340-test-results
201 Bytes
execute_sival_fpga_tests_cw310-targets
784 Bytes
execute_sival_fpga_tests_cw310-test-results
37.4 KB
execute_sival_fpga_tests_cw340-targets
502 Bytes
execute_sival_fpga_tests_cw340-test-results
39.4 KB
execute_sival_rom_ext_fpga_tests_cw310-targets
2.21 KB
execute_sival_rom_ext_fpga_tests_cw310-test-results
181 KB
execute_sival_rom_ext_fpga_tests_cw340-targets
435 Bytes
execute_sival_rom_ext_fpga_tests_cw340-test-results
18.1 KB
execute_test_rom_fpga_tests_cw310-targets
312 Bytes
execute_test_rom_fpga_tests_cw310-test-results
2.92 KB
execute_test_rom_fpga_tests_cw340-targets
258 Bytes
execute_test_rom_fpga_tests_cw340-test-results
44 KB
partial-build-bin-chip_earlgrey_cw310
6 MB
partial-build-bin-chip_earlgrey_cw310_hyperdebug
6.05 MB
partial-build-bin-chip_earlgrey_cw340
10.1 MB
sw_build_test-test-results
76.2 KB
verilated_englishbreakfast
6.49 MB
verilator_earlgrey-test-results
8.94 KB