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[prim,rtl] Remove ~under_rst from the expression for fifo_incr_wptr #4493

[prim,rtl] Remove ~under_rst from the expression for fifo_incr_wptr

[prim,rtl] Remove ~under_rst from the expression for fifo_incr_wptr #4493

Triggered via pull request January 16, 2025 15:32
Status Failure
Total duration 3h 49m 43s
Artifacts 31

ci.yml

on: pull_request
Earl Grey for CW310 Hyperdebug  /  Build bitstream
1h 5m
Earl Grey for CW310 Hyperdebug / Build bitstream
Earl Grey for CW310  /  Build bitstream
1h 47m
Earl Grey for CW310 / Build bitstream
Earl Grey for CW340  /  Build bitstream
1h 34m
Earl Grey for CW340 / Build bitstream
Lint (slow)
12m 1s
Lint (slow)
Build documentation
4m 53s
Build documentation
Airgapped build
8m 54s
Airgapped build
Verible lint
1m 8s
Verible lint
Run OTBN smoke Test
2m 33s
Run OTBN smoke Test
Run OTBN crypto tests
2m 37s
Run OTBN crypto tests
Verilated English Breakfast
7m 33s
Verilated English Breakfast
Verilated Earl Grey
1h 21m
Verilated Earl Grey
CW305's Bitstream
23m 30s
CW305's Bitstream
Build Docker Containers
2m 43s
Build Docker Containers
Build and test software
13m 54s
Build and test software
CW310 ROM_EXT Tests  /  FPGA test
10m 14s
CW310 ROM_EXT Tests / FPGA test
CW310 SiVal Tests  /  FPGA test
23m 26s
CW310 SiVal Tests / FPGA test
CW310 SiVal ROM_EXT Tests  /  FPGA test
34m 32s
CW310 SiVal ROM_EXT Tests / FPGA test
CW310 Manufacturing Tests  /  FPGA test
28m 13s
CW310 Manufacturing Tests / FPGA test
CW310 Test ROM Tests  /  FPGA test
5m 4s
CW310 Test ROM Tests / FPGA test
CW310 ROM Tests  /  FPGA test
48m 10s
CW310 ROM Tests / FPGA test
CW340 Test ROM Tests  /  FPGA test
3m 41s
CW340 Test ROM Tests / FPGA test
CW340 ROM Tests  /  FPGA test
48s
CW340 ROM Tests / FPGA test
CW340 ROM_EXT Tests  /  FPGA test
5m 33s
CW340 ROM_EXT Tests / FPGA test
CW340 SiVal Tests  /  FPGA test
16m 44s
CW340 SiVal Tests / FPGA test
CW340 SiVal ROM_EXT Tests  /  FPGA test
4m 11s
CW340 SiVal ROM_EXT Tests / FPGA test
CW340 Manufacturing Tests  /  FPGA test
38m 0s
CW340 Manufacturing Tests / FPGA test
Cache bitstreams to GCP
0s
Cache bitstreams to GCP
Verify FPGA jobs
20s
Verify FPGA jobs
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Annotations

12 errors
Lint (slow)
Countermeasure check failed.
Lint (slow)
Process completed with exit code 1.
Lint (slow)
Some target names have banned characters.
Lint (slow)
Process completed with exit code 1.
Lint (slow)
Process completed with exit code 1.
Lint (slow)
Countermeasure check failed.
Lint (slow)
Process completed with exit code 1.
Build and test software
Process completed with exit code 1.
CW310 SiVal ROM_EXT Tests / FPGA test
Process completed with exit code 3.
CW310 ROM Tests / FPGA test
Process completed with exit code 3.

Artifacts

Produced during runtime
Name Size
chip_englishbreakfast_cw305
1.4 MB
execute_manuf_fpga_tests_cw310-targets
623 Bytes
execute_manuf_fpga_tests_cw310-test-results
59.1 KB
execute_manuf_fpga_tests_cw340-targets
594 Bytes
execute_manuf_fpga_tests_cw340-test-results
55.4 KB
execute_rom_ext_fpga_tests_cw310-targets
583 Bytes
execute_rom_ext_fpga_tests_cw310-test-results
26 KB
execute_rom_ext_fpga_tests_cw340-targets
437 Bytes
execute_rom_ext_fpga_tests_cw340-test-results
7.25 KB
execute_rom_fpga_tests_cw310-targets
1.76 KB
execute_rom_fpga_tests_cw310-test-results
47.7 KB
execute_rom_fpga_tests_cw340-targets
162 Bytes
execute_rom_fpga_tests_cw340-test-results
201 Bytes
execute_sival_fpga_tests_cw310-targets
784 Bytes
execute_sival_fpga_tests_cw310-test-results
38.5 KB
execute_sival_fpga_tests_cw340-targets
502 Bytes
execute_sival_fpga_tests_cw340-test-results
39.4 KB
execute_sival_rom_ext_fpga_tests_cw310-targets
2.27 KB
execute_sival_rom_ext_fpga_tests_cw310-test-results
187 KB
execute_sival_rom_ext_fpga_tests_cw340-targets
435 Bytes
execute_sival_rom_ext_fpga_tests_cw340-test-results
17.1 KB
execute_test_rom_fpga_tests_cw310-targets
326 Bytes
execute_test_rom_fpga_tests_cw310-test-results
3.21 KB
execute_test_rom_fpga_tests_cw340-targets
258 Bytes
execute_test_rom_fpga_tests_cw340-test-results
44.4 KB
partial-build-bin-chip_earlgrey_cw310
6.01 MB
partial-build-bin-chip_earlgrey_cw310_hyperdebug
5.96 MB
partial-build-bin-chip_earlgrey_cw340
10 MB
sw_build_test-test-results
72.1 KB
verilated_englishbreakfast
6.98 MB
verilator_earlgrey-test-results
9.22 KB