Fix for OpenPiton release

msfschaffner · Mar 18, 2019 · 55b6948 · 55b6948
1 parent 5eed9ef
commit 55b6948
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Showing 2 changed files with 67 additions and 66 deletions.
diff --git a/.gitlab-ci.yml b/.gitlab-ci.yml
@@ -28,8 +28,8 @@ variables:
 
 stages:
   - build
-  - standard
-  - wb
+  - write-back
+  - write-through
 
 ###################################
 # prepare
@@ -46,101 +46,101 @@ build:
         - tmp
 
 ###################################
-# tests with standard cache system
+# tests with write-back cache system
 
 # rv64ui-p-* and rv64ui-v-* tests
 asm-quest:
-  stage: standard
+  stage: write-back
   script:
     - make -j${NUM_JOBS} run-asm-tests batch-mode=1 defines=WB_DCACHE
   dependencies:
     - build
 
 amo-quest:
-  stage: standard
+  stage: write-back
   script:
     - make -j${NUM_JOBS} run-amo-tests batch-mode=1 defines=WB_DCACHE
   dependencies:
     - build
 
-fp-quest:
-  stage: standard
-  script:
-    - make -j${NUM_JOBS} run-fp-tests batch-mode=1 defines=WB_DCACHE
-  dependencies:
-    - build
+# fp-quest:
+#   stage: write-back
+#   script:
+#     - make -j${NUM_JOBS} run-fp-tests batch-mode=1 defines=WB_DCACHE
+#   dependencies:
+#     - build
 
 bench-quest:
-  stage: standard
+  stage: write-back
   script:
     - make -j${NUM_JOBS} run-benchmarks batch-mode=1 defines=WB_DCACHE
   dependencies:
     - build
 
 # rv64ui-p-* tests
 asm1-ver:
-  stage: standard
+  stage: write-back
   script:
     - make -j${NUM_JOBS} run-asm-tests1-verilator defines=WB_DCACHE
   dependencies:
     - build
 
 # rv64ui-v-* tests
 asm2-ver:
-  stage: standard
+  stage: write-back
   script:
     - make -j${NUM_JOBS} run-asm-tests2-verilator defines=WB_DCACHE
   dependencies:
     - build
 
 # rv64um-*-* tests
 mul-ver:
-  stage: standard
+  stage: write-back
   script:
     - make -j${NUM_JOBS} run-mul-verilator defines=WB_DCACHE
   dependencies:
     - build
 
 # atomics
 amo-ver:
-  stage: standard
+  stage: write-back
   script:
     - make -j${NUM_JOBS} run-amo-verilator defines=WB_DCACHE
   dependencies:
     - build
 
 # floating point
-fp-ver:
-  stage: standard
-  script:
-    - make -j${NUM_JOBS} run-fp-verilator defines=WB_DCACHE
-  dependencies:
-    - build
+# fp-ver:
+#   stage: write-back
+#   script:
+#     - make -j${NUM_JOBS} run-fp-verilator defines=WB_DCACHE
+#   dependencies:
+#     - build
 
 bench-ver:
-  stage: standard
+  stage: write-back
   script:
     - make -j${NUM_JOBS} run-benchmarks-verilator defines=WB_DCACHE
   dependencies:
     - build
 
 bench-ver:
-  stage: standard
+  stage: write-back
   script:
-    - make -j${NUM_JOBS} run-benchmarks-verilator defines=WT_DCACHE
+    - make -j${NUM_JOBS} run-benchmarks-verilator defines=WB_DCACHE
   dependencies:
     - build
 
 # torture:
-#   stage: standard
+#   stage: write-back
 #   script:
 #     - make torture-rtest batch-mode=1
 #     - make torture-rtest-verilator
 #   dependencies:
 #     - build
 
 serdiv-quest:
-  stage: standard
+  stage: write-back
   script:
     - cd tb/tb_serdiv/
     - make simc
@@ -167,12 +167,12 @@ s-amo-quest:
     - build
 
 # floating point
-s-fp-quest:
-  stage: write-through
-  script:
-    - make -j${NUM_JOBS} run-fp-tests defines=WT_DCACHE batch-mode=1
-  dependencies:
-    - build
+# s-fp-quest:
+#   stage: write-through
+#   script:
+#     - make -j${NUM_JOBS} run-fp-tests defines=WT_DCACHE batch-mode=1
+#   dependencies:
+#     - build
 
 s-bench-quest:
   stage: write-through
@@ -214,12 +214,12 @@ amo-ver:
     - build
 
 # floating point
-s-fp-ver:
-  stage: write-through
-  script:
-    - make -j${NUM_JOBS} run-fp-verilator defines=WT_DCACHE
-  dependencies:
-    - build
+# s-fp-ver:
+#   stage: write-through
+#   script:
+#     - make -j${NUM_JOBS} run-fp-verilator defines=WT_DCACHE
+#   dependencies:
+#     - build
 
 s-bench-ver:
   stage: write-through
@@ -238,7 +238,7 @@ s-icache-quest:
 s-dcache-quest:
   stage: write-through
   script:
-    - cd tb/tb_wT_dcache/
+    - cd tb/tb_wt_dcache/
     - make simc
     - "grep 'CI: PASSED' RD0_summary.rep"
     - "grep 'CI: PASSED' RD1_summary.rep"

diff --git a/Flist.ariane b/Flist.ariane
@@ -27,34 +27,35 @@ src/common_cells/src/sync_wedge.sv
 src/common_cells/src/cdc_2phase.sv
 src/common_cells/src/stream_arbiter_flushable.sv
 src/common_cells/src/shift_reg.sv
-src/fpu/src/fpu_div_sqrt_mvp/hdl/fpu_ff.sv
-src/fpu/src/fpu_div_sqrt_mvp/hdl/defs_div_sqrt_mvp.sv
-src/fpu/src/fpu_div_sqrt_mvp/hdl/control_mvp.sv
-src/fpu/src/fpu_div_sqrt_mvp/hdl/div_sqrt_mvp_wrapper.sv
-src/fpu/src/fpu_div_sqrt_mvp/hdl/div_sqrt_top_mvp.sv
-src/fpu/src/fpu_div_sqrt_mvp/hdl/iteration_div_sqrt_mvp.sv
-src/fpu/src/fpu_div_sqrt_mvp/hdl/norm_div_sqrt_mvp.sv
-src/fpu/src/fpu_div_sqrt_mvp/hdl/nrbd_nrsc_mvp.sv
-src/fpu/src/fpu_div_sqrt_mvp/hdl/preprocess_mvp.sv
 src/fpu/src/fpnew_pkg.sv
-src/fpu/src/fpnew_cast_multi.sv
-src/fpu/src/fpnew_classifier.sv
-src/fpu/src/fpnew_divsqrt_multi.sv
-src/fpu/src/fpnew_f2fcast.sv
-src/fpu/src/fpnew_f2icast.sv
-src/fpu/src/fpnew_fma_multi.sv
-src/fpu/src/fpnew_fma.sv
-src/fpu/src/fpnew_i2fcast.sv
-src/fpu/src/fpnew_noncomp.sv
-src/fpu/src/fpnew_opgroup_block.sv
-src/fpu/src/fpnew_opgroup_fmt_slice.sv
-src/fpu/src/fpnew_opgroup_multifmt_slice.sv
-src/fpu/src/fpnew_pipe_in.sv
-src/fpu/src/fpnew_pipe_out.sv
-src/fpu/src/fpnew_pkg.sv
-src/fpu/src/fpnew_rounding.sv
-src/fpu/src/fpnew_top.sv
+// src/fpu/src/fpu_div_sqrt_mvp/hdl/fpu_ff.sv
+// src/fpu/src/fpu_div_sqrt_mvp/hdl/defs_div_sqrt_mvp.sv
+// src/fpu/src/fpu_div_sqrt_mvp/hdl/control_mvp.sv
+// src/fpu/src/fpu_div_sqrt_mvp/hdl/div_sqrt_mvp_wrapper.sv
+// src/fpu/src/fpu_div_sqrt_mvp/hdl/div_sqrt_top_mvp.sv
+// src/fpu/src/fpu_div_sqrt_mvp/hdl/iteration_div_sqrt_mvp.sv
+// src/fpu/src/fpu_div_sqrt_mvp/hdl/norm_div_sqrt_mvp.sv
+// src/fpu/src/fpu_div_sqrt_mvp/hdl/nrbd_nrsc_mvp.sv
+// src/fpu/src/fpu_div_sqrt_mvp/hdl/preprocess_mvp.sv
+// src/fpu/src/fpnew_cast_multi.sv
+// src/fpu/src/fpnew_classifier.sv
+// src/fpu/src/fpnew_divsqrt_multi.sv
+// src/fpu/src/fpnew_f2fcast.sv
+// src/fpu/src/fpnew_f2icast.sv
+// src/fpu/src/fpnew_fma_multi.sv
+// src/fpu/src/fpnew_fma.sv
+// src/fpu/src/fpnew_i2fcast.sv
+// src/fpu/src/fpnew_noncomp.sv
+// src/fpu/src/fpnew_opgroup_block.sv
+// src/fpu/src/fpnew_opgroup_fmt_slice.sv
+// src/fpu/src/fpnew_opgroup_multifmt_slice.sv
+// src/fpu/src/fpnew_pipe_in.sv
+// src/fpu/src/fpnew_pipe_out.sv
+// src/fpu/src/fpnew_pkg.sv
+// src/fpu/src/fpnew_rounding.sv
+// src/fpu/src/fpnew_top.sv
 src/axi/src/axi_pkg.sv
+tb/ariane_soc_pkg.sv
 src/riscv-dbg/src/dm_pkg.sv
 include/riscv_pkg.sv
 include/ariane_pkg.sv