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1. RISC-V RISC-V Public

   Implementation of RV32IF using verilog HDL and tested on Altera DE1 board

   VHDL 3

2. Verilog Verilog Public

   Verilog HDL labs implemented on Altera DE1 board

   Verilog 2

3. Matric_Multiplication_Cuda Matric_Multiplication_Cuda Public

   Cuda 2

4. Booth_Algorithm_vhdl Booth_Algorithm_vhdl Public

   Implementation of Booth Algorithm in VHDL.

   VHDL 2

5. RSSIreader_java_AndroidStudio RSSIreader_java_AndroidStudio Public

   Simple Android Application written in java to read and display the received signal strength indicator (RSSI) of specified Wifi network.

   Java 1

6. Spi_slave_vhdl Spi_slave_vhdl Public

   Compilation of VHDL codes.

   VHDL 1