Pinned Loading

1. open_eFPGA open_eFPGA Public

   Verilog 7 5

2. fuserisc_ver2 fuserisc_ver2 Public

   FuseRISC - A dual core eFPGA DISC enabled SoC

   Verilog 7

3. rram_testchip rram_testchip Public

   Verilog 4 2

4. eFPGA_v3_caravel eFPGA_v3_caravel Public

   Forked from efabless/caravel_user_project

   https://caravel-user-project.readthedocs.io

   Verilog 6

5. ICESOC ICESOC Public

   Verilog 3 1

6. FPGA-Research/eFPGA---RTL-to-GDS-with-SKY130 FPGA-Research/eFPGA---RTL-to-GDS-with-SKY130 Public

   This repo shows an implementation of an FPGA from RTL to GDS with open Skywater-130 pdk

   Verilog 27 12