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[ blas ] Custom-defined scopy functions : aarch64, armv7, x86, incremental indices #2791
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- Using traditional cblas_scopy is causing some segfault in some cases. - Implement custom scopy function to avoid this issue. **Self evaluation:** 1. Build test: [X]Passed [ ]Failed [ ]Skipped 2. Run test: [X]Passed [ ]Failed [ ]Skipped Signed-off-by: skykongkong8 <[email protected]>
📝 TAOS-CI Version: 1.5.20200925. Thank you for submitting PR #2791. Please a submit 1commit/1PR (one commit per one PR) policy to get comments quickly from reviewers. Your PR must pass all verificiation processes of cibot before starting a review process from reviewers. If you are new member to join this project, please read manuals in documentation folder and wiki page. In order to monitor a progress status of your PR in more detail, visit http://ci.nnstreamer.ai/. |
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cibot: @skykongkong8, nntrainer/tensor/blas_neon.cpp includes bug(s). Please fix incorrect coding constructs in your commit before entering a review process. |
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cibot: @skykongkong8, A builder checker could not be completed because one of the checkers is not completed. In order to find out a reason, please go to http://ci.nnstreamer.ai/nntrainer/ci/repo-workers/pr-checker/2791-202411111330500.056691884994507-765b724b372bea90084e7970c778b5ea51ce56d2/. |
- Current internal SIMD implementation does not support incremental indicies. - Let __fallback_scopy to handle this issue. **Self evaluation:** 1. Build test: [X]Passed [ ]Failed [ ]Skipped 2. Run test: [X]Passed [ ]Failed [ ]Skipped Signed-off-by: skykongkong8 <[email protected]>
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@skykongkong8, 💯 All CI checkers are successfully verified. Thanks.
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LGTM
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LGTM
X86 (AVX2 asm)
aarch64 (NEON asm), armv7l (NEON intrinsic)
This is my first time coding in inline asm style, so there might be a little bit of awkwardness. Please review carefully.
Self evaluation: